| stats.txt (10726:8a20e2a1562d) | stats.txt (10736:4433fb00fa7d) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.625396 # Number of seconds simulated 4sim_ticks 2625395606000 # Number of ticks simulated 5final_tick 2625395606000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 95828 # Simulator instruction rate (inst/s) 8host_op_rate 116265 # Simulator op (including micro ops) rate (op/s) --- 851 unchanged lines hidden (view full) --- 860system.cpu0.commit.op_class_0::SimdFloatMultAcc 0 0.00% 67.52% # Class of committed instruction 861system.cpu0.commit.op_class_0::SimdFloatSqrt 0 0.00% 67.52% # Class of committed instruction 862system.cpu0.commit.op_class_0::MemRead 21761541 18.03% 85.55% # Class of committed instruction 863system.cpu0.commit.op_class_0::MemWrite 17442465 14.45% 100.00% # Class of committed instruction 864system.cpu0.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 865system.cpu0.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 866system.cpu0.commit.op_class_0::total 120715819 # Class of committed instruction 867system.cpu0.commit.bw_lim_events 1448193 # number cycles where commit BW limit reached | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.625396 # Number of seconds simulated 4sim_ticks 2625395606000 # Number of ticks simulated 5final_tick 2625395606000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 95828 # Simulator instruction rate (inst/s) 8host_op_rate 116265 # Simulator op (including micro ops) rate (op/s) --- 851 unchanged lines hidden (view full) --- 860system.cpu0.commit.op_class_0::SimdFloatMultAcc 0 0.00% 67.52% # Class of committed instruction 861system.cpu0.commit.op_class_0::SimdFloatSqrt 0 0.00% 67.52% # Class of committed instruction 862system.cpu0.commit.op_class_0::MemRead 21761541 18.03% 85.55% # Class of committed instruction 863system.cpu0.commit.op_class_0::MemWrite 17442465 14.45% 100.00% # Class of committed instruction 864system.cpu0.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 865system.cpu0.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 866system.cpu0.commit.op_class_0::total 120715819 # Class of committed instruction 867system.cpu0.commit.bw_lim_events 1448193 # number cycles where commit BW limit reached |
| 868system.cpu0.commit.bw_limited 0 # number of insts not committed due to BW limits | |
| 869system.cpu0.rob.rob_reads 292184577 # The number of ROB reads 870system.cpu0.rob.rob_writes 263546817 # The number of ROB writes 871system.cpu0.timesIdled 122559 # Number of times that the entire CPU went into an idle state and unscheduled itself 872system.cpu0.idleCycles 3099207 # Total number of cycles that the CPU has spent unscheduled due to idling 873system.cpu0.quiesceCycles 5058081346 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt 874system.cpu0.committedInsts 99512641 # Number of Instructions Simulated 875system.cpu0.committedOps 120594125 # Number of Ops (including micro ops) Simulated 876system.cpu0.cpi 1.936540 # CPI: Cycles Per Instruction --- 1195 unchanged lines hidden (view full) --- 2072system.cpu1.commit.op_class_0::SimdFloatMultAcc 0 0.00% 63.35% # Class of committed instruction 2073system.cpu1.commit.op_class_0::SimdFloatSqrt 0 0.00% 63.35% # Class of committed instruction 2074system.cpu1.commit.op_class_0::MemRead 4980621 19.58% 82.93% # Class of committed instruction 2075system.cpu1.commit.op_class_0::MemWrite 4344257 17.07% 100.00% # Class of committed instruction 2076system.cpu1.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 2077system.cpu1.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 2078system.cpu1.commit.op_class_0::total 25443224 # Class of committed instruction 2079system.cpu1.commit.bw_lim_events 442982 # number cycles where commit BW limit reached | 868system.cpu0.rob.rob_reads 292184577 # The number of ROB reads 869system.cpu0.rob.rob_writes 263546817 # The number of ROB writes 870system.cpu0.timesIdled 122559 # Number of times that the entire CPU went into an idle state and unscheduled itself 871system.cpu0.idleCycles 3099207 # Total number of cycles that the CPU has spent unscheduled due to idling 872system.cpu0.quiesceCycles 5058081346 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt 873system.cpu0.committedInsts 99512641 # Number of Instructions Simulated 874system.cpu0.committedOps 120594125 # Number of Ops (including micro ops) Simulated 875system.cpu0.cpi 1.936540 # CPI: Cycles Per Instruction --- 1195 unchanged lines hidden (view full) --- 2071system.cpu1.commit.op_class_0::SimdFloatMultAcc 0 0.00% 63.35% # Class of committed instruction 2072system.cpu1.commit.op_class_0::SimdFloatSqrt 0 0.00% 63.35% # Class of committed instruction 2073system.cpu1.commit.op_class_0::MemRead 4980621 19.58% 82.93% # Class of committed instruction 2074system.cpu1.commit.op_class_0::MemWrite 4344257 17.07% 100.00% # Class of committed instruction 2075system.cpu1.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 2076system.cpu1.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 2077system.cpu1.commit.op_class_0::total 25443224 # Class of committed instruction 2078system.cpu1.commit.bw_lim_events 442982 # number cycles where commit BW limit reached |
| 2080system.cpu1.commit.bw_limited 0 # number of insts not committed due to BW limits | |
| 2081system.cpu1.rob.rob_reads 68115809 # The number of ROB reads 2082system.cpu1.rob.rob_writes 56808236 # The number of ROB writes 2083system.cpu1.timesIdled 67589 # Number of times that the entire CPU went into an idle state and unscheduled itself 2084system.cpu1.idleCycles 980056 # Total number of cycles that the CPU has spent unscheduled due to idling 2085system.cpu1.quiesceCycles 5207108948 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt 2086system.cpu1.committedInsts 20826795 # Number of Instructions Simulated 2087system.cpu1.committedOps 25410011 # Number of Ops (including micro ops) Simulated 2088system.cpu1.cpi 2.071033 # CPI: Cycles Per Instruction --- 1518 unchanged lines hidden --- | 2079system.cpu1.rob.rob_reads 68115809 # The number of ROB reads 2080system.cpu1.rob.rob_writes 56808236 # The number of ROB writes 2081system.cpu1.timesIdled 67589 # Number of times that the entire CPU went into an idle state and unscheduled itself 2082system.cpu1.idleCycles 980056 # Total number of cycles that the CPU has spent unscheduled due to idling 2083system.cpu1.quiesceCycles 5207108948 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt 2084system.cpu1.committedInsts 20826795 # Number of Instructions Simulated 2085system.cpu1.committedOps 25410011 # Number of Ops (including micro ops) Simulated 2086system.cpu1.cpi 2.071033 # CPI: Cycles Per Instruction --- 1518 unchanged lines hidden --- |