simout (10517:ba51f8572571) simout (10791:a80d2d716a53)
1gem5 Simulator System. http://gem5.org
2gem5 is copyrighted software; use the --copyright option for details.
3
1gem5 Simulator System. http://gem5.org
2gem5 is copyrighted software; use the --copyright option for details.
3
4gem5 compiled Oct 31 2014 10:01:44
5gem5 started Oct 31 2014 11:38:41
6gem5 executing on u200540-lin
7command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re /work/gem5.ext/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual
4gem5 compiled Apr 20 2015 13:24:23
5gem5 started Apr 20 2015 13:24:39
6gem5 executing on phenom
7command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual
8
8Global frequency set at 1000000000000 ticks per second
9Global frequency set at 1000000000000 ticks per second
9info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
10 0: system.cpu0.isa: ISA system set to: 0x479a680 0x479a680
11 0: system.cpu1.isa: ISA system set to: 0x479a680 0x479a680
10info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
11 0: system.cpu0.isa: ISA system set to: 0x4157820 0x4157820
12 0: system.cpu1.isa: ISA system set to: 0x4157820 0x4157820
12info: Using bootloader at address 0x10
13info: Using kernel entry physical address at 0x80008000
13info: Using bootloader at address 0x10
14info: Using kernel entry physical address at 0x80008000
14info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
15info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
15info: Entering event queue @ 0. Starting simulation...
16info: Read CNTFREQ_EL0 frequency
17info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
18info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
19info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
20info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
21info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
22info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
23info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
24info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
25info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
26info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
27info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
28info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
29info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
30info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
31info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
16info: Entering event queue @ 0. Starting simulation...
17info: Read CNTFREQ_EL0 frequency
18info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
19info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
20info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
21info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
22info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
23info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
24info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
25info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
26info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
27info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
28info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
29info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
30info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
31info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
32info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
32Exiting @ tick 2824340874000 because m5_exit instruction encountered
33Exiting @ tick 2625395606000 because m5_exit instruction encountered