| config.ini (11570:4aac82f10951) | config.ini (11680:b4d943429dc6) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 22 unchanged lines hidden (view full) --- 31highest_el_is_64=false 32init_param=0 33kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 22 unchanged lines hidden (view full) --- 31highest_el_is_64=false 32init_param=0 33kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing |
| 39mem_ranges=2147483648:2415919103 | 39mem_ranges=2147483648:2415919103:0:0:0:0 |
| 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 --- 20 unchanged lines hidden (view full) --- 68clk_domain=system.clk_domain 69default_p_state=UNDEFINED 70delay=50000 71eventq_index=0 72p_state_clk_gate_bins=20 73p_state_clk_gate_max=1000000000000 74p_state_clk_gate_min=1000 75power_model=Null | 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 --- 20 unchanged lines hidden (view full) --- 68clk_domain=system.clk_domain 69default_p_state=UNDEFINED 70delay=50000 71eventq_index=0 72p_state_clk_gate_bins=20 73p_state_clk_gate_max=1000000000000 74p_state_clk_gate_min=1000 75power_model=Null |
| 76ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 | 76ranges=788529152:805306367:0:0:0:0 721420288:725614591:0:0:0:0 805306368:1073741823:0:0:0:0 1073741824:1610612735:0:0:0:0 402653184:469762047:0:0:0:0 469762048:536870911:0:0:0:0 |
| 77req_size=16 78resp_size=16 79master=system.iobus.slave[0] 80slave=system.membus.master[0] 81 82[system.cf0] 83type=IdeDisk 84children=image --- 118 unchanged lines hidden (view full) --- 203localHistoryTableSize=2048 204localPredictorSize=2048 205numThreads=1 206useIndirect=true 207 208[system.cpu.dcache] 209type=Cache 210children=tags | 77req_size=16 78resp_size=16 79master=system.iobus.slave[0] 80slave=system.membus.master[0] 81 82[system.cf0] 83type=IdeDisk 84children=image --- 118 unchanged lines hidden (view full) --- 203localHistoryTableSize=2048 204localPredictorSize=2048 205numThreads=1 206useIndirect=true 207 208[system.cpu.dcache] 209type=Cache 210children=tags |
| 211addr_ranges=0:18446744073709551615 | 211addr_ranges=0:18446744073709551615:0:0:0:0 |
| 212assoc=4 213clk_domain=system.cpu_clk_domain 214clusivity=mostly_incl 215default_p_state=UNDEFINED 216demand_mshr_reserve=1 217eventq_index=0 218hit_latency=2 219is_read_only=false --- 463 unchanged lines hidden (view full) --- 683[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 684type=MinorOpClass 685eventq_index=0 686opClass=InstPrefetch 687 688[system.cpu.icache] 689type=Cache 690children=tags | 212assoc=4 213clk_domain=system.cpu_clk_domain 214clusivity=mostly_incl 215default_p_state=UNDEFINED 216demand_mshr_reserve=1 217eventq_index=0 218hit_latency=2 219is_read_only=false --- 463 unchanged lines hidden (view full) --- 683[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 684type=MinorOpClass 685eventq_index=0 686opClass=InstPrefetch 687 688[system.cpu.icache] 689type=Cache 690children=tags |
| 691addr_ranges=0:18446744073709551615 | 691addr_ranges=0:18446744073709551615:0:0:0:0 |
| 692assoc=1 693clk_domain=system.cpu_clk_domain 694clusivity=mostly_incl 695default_p_state=UNDEFINED 696demand_mshr_reserve=1 697eventq_index=0 698hit_latency=2 699is_read_only=true --- 43 unchanged lines hidden (view full) --- 743id_aa64afr0_el1=0 744id_aa64afr1_el1=0 745id_aa64dfr0_el1=1052678 746id_aa64dfr1_el1=0 747id_aa64isar0_el1=0 748id_aa64isar1_el1=0 749id_aa64mmfr0_el1=15728642 750id_aa64mmfr1_el1=0 | 692assoc=1 693clk_domain=system.cpu_clk_domain 694clusivity=mostly_incl 695default_p_state=UNDEFINED 696demand_mshr_reserve=1 697eventq_index=0 698hit_latency=2 699is_read_only=true --- 43 unchanged lines hidden (view full) --- 743id_aa64afr0_el1=0 744id_aa64afr1_el1=0 745id_aa64dfr0_el1=1052678 746id_aa64dfr1_el1=0 747id_aa64isar0_el1=0 748id_aa64isar1_el1=0 749id_aa64mmfr0_el1=15728642 750id_aa64mmfr1_el1=0 |
| 751id_aa64pfr0_el1=17 | 751id_aa64pfr0_el1=34 |
| 752id_aa64pfr1_el1=0 753id_isar0=34607377 754id_isar1=34677009 755id_isar2=555950401 756id_isar3=17899825 757id_isar4=268501314 758id_isar5=0 759id_mmfr0=270536963 --- 55 unchanged lines hidden (view full) --- 815p_state_clk_gate_min=1000 816power_model=Null 817sys=system 818port=system.cpu.toL2Bus.slave[2] 819 820[system.cpu.l2cache] 821type=Cache 822children=tags | 752id_aa64pfr1_el1=0 753id_isar0=34607377 754id_isar1=34677009 755id_isar2=555950401 756id_isar3=17899825 757id_isar4=268501314 758id_isar5=0 759id_mmfr0=270536963 --- 55 unchanged lines hidden (view full) --- 815p_state_clk_gate_min=1000 816power_model=Null 817sys=system 818port=system.cpu.toL2Bus.slave[2] 819 820[system.cpu.l2cache] 821type=Cache 822children=tags |
| 823addr_ranges=0:18446744073709551615 | 823addr_ranges=0:18446744073709551615:0:0:0:0 |
| 824assoc=8 825clk_domain=system.cpu_clk_domain 826clusivity=mostly_incl 827default_p_state=UNDEFINED 828demand_mshr_reserve=1 829eventq_index=0 830hit_latency=20 831is_read_only=false --- 100 unchanged lines hidden (view full) --- 932use_default_range=false 933width=16 934master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 935slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 936 937[system.iocache] 938type=Cache 939children=tags | 824assoc=8 825clk_domain=system.cpu_clk_domain 826clusivity=mostly_incl 827default_p_state=UNDEFINED 828demand_mshr_reserve=1 829eventq_index=0 830hit_latency=20 831is_read_only=false --- 100 unchanged lines hidden (view full) --- 932use_default_range=false 933width=16 934master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 935slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 936 937[system.iocache] 938type=Cache 939children=tags |
| 940addr_ranges=2147483648:2415919103 | 940addr_ranges=2147483648:2415919103:0:0:0:0 |
| 941assoc=8 942clk_domain=system.clk_domain 943clusivity=mostly_incl 944default_p_state=UNDEFINED 945demand_mshr_reserve=1 946eventq_index=0 947hit_latency=50 948is_read_only=false --- 28 unchanged lines hidden (view full) --- 977p_state_clk_gate_max=1000000000000 978p_state_clk_gate_min=1000 979power_model=Null 980sequential_access=false 981size=1024 982 983[system.membus] 984type=CoherentXBar | 941assoc=8 942clk_domain=system.clk_domain 943clusivity=mostly_incl 944default_p_state=UNDEFINED 945demand_mshr_reserve=1 946eventq_index=0 947hit_latency=50 948is_read_only=false --- 28 unchanged lines hidden (view full) --- 977p_state_clk_gate_max=1000000000000 978p_state_clk_gate_min=1000 979power_model=Null 980sequential_access=false 981size=1024 982 983[system.membus] 984type=CoherentXBar |
| 985children=badaddr_responder | 985children=badaddr_responder snoop_filter |
| 986clk_domain=system.clk_domain 987default_p_state=UNDEFINED 988eventq_index=0 989forward_latency=4 990frontend_latency=3 991p_state_clk_gate_bins=20 992p_state_clk_gate_max=1000000000000 993p_state_clk_gate_min=1000 994point_of_coherency=true 995power_model=Null 996response_latency=2 | 986clk_domain=system.clk_domain 987default_p_state=UNDEFINED 988eventq_index=0 989forward_latency=4 990frontend_latency=3 991p_state_clk_gate_bins=20 992p_state_clk_gate_max=1000000000000 993p_state_clk_gate_min=1000 994point_of_coherency=true 995power_model=Null 996response_latency=2 |
| 997snoop_filter=Null | 997snoop_filter=system.membus.snoop_filter |
| 998snoop_response_latency=4 999system=system 1000use_default_range=false 1001width=16 1002default=system.membus.badaddr_responder.pio 1003master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 1004slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 1005 --- 15 unchanged lines hidden (view full) --- 1021ret_data32=4294967295 1022ret_data64=18446744073709551615 1023ret_data8=255 1024system=system 1025update_data=false 1026warn_access=warn 1027pio=system.membus.default 1028 | 998snoop_response_latency=4 999system=system 1000use_default_range=false 1001width=16 1002default=system.membus.badaddr_responder.pio 1003master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 1004slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 1005 --- 15 unchanged lines hidden (view full) --- 1021ret_data32=4294967295 1022ret_data64=18446744073709551615 1023ret_data8=255 1024system=system 1025update_data=false 1026warn_access=warn 1027pio=system.membus.default 1028 |
| 1029[system.membus.snoop_filter] 1030type=SnoopFilter 1031eventq_index=0 1032lookup_latency=1 1033max_capacity=8388608 1034system=system 1035 |
|
| 1029[system.physmem] 1030type=DRAMCtrl | 1036[system.physmem] 1037type=DRAMCtrl |
| 1031IDD0=0.075000 | 1038IDD0=0.055000 |
| 1032IDD02=0.000000 | 1039IDD02=0.000000 |
| 1033IDD2N=0.050000 | 1040IDD2N=0.032000 |
| 1034IDD2N2=0.000000 1035IDD2P0=0.000000 1036IDD2P02=0.000000 | 1041IDD2N2=0.000000 1042IDD2P0=0.000000 1043IDD2P02=0.000000 |
| 1037IDD2P1=0.000000 | 1044IDD2P1=0.032000 |
| 1038IDD2P12=0.000000 | 1045IDD2P12=0.000000 |
| 1039IDD3N=0.057000 | 1046IDD3N=0.038000 |
| 1040IDD3N2=0.000000 1041IDD3P0=0.000000 1042IDD3P02=0.000000 | 1047IDD3N2=0.000000 1048IDD3P0=0.000000 1049IDD3P02=0.000000 |
| 1043IDD3P1=0.000000 | 1050IDD3P1=0.038000 |
| 1044IDD3P12=0.000000 | 1051IDD3P12=0.000000 |
| 1045IDD4R=0.187000 | 1052IDD4R=0.157000 |
| 1046IDD4R2=0.000000 | 1053IDD4R2=0.000000 |
| 1047IDD4W=0.165000 | 1054IDD4W=0.125000 |
| 1048IDD4W2=0.000000 | 1055IDD4W2=0.000000 |
| 1049IDD5=0.220000 | 1056IDD5=0.235000 |
| 1050IDD52=0.000000 | 1057IDD52=0.000000 |
| 1051IDD6=0.000000 | 1058IDD6=0.020000 |
| 1052IDD62=0.000000 1053VDD=1.500000 1054VDD2=0.000000 1055activation_limit=4 1056addr_mapping=RoRaBaCoCh 1057bank_groups_per_rank=0 1058banks_per_rank=8 1059burst_length=8 1060channels=1 1061clk_domain=system.clk_domain 1062conf_table_reported=true 1063default_p_state=UNDEFINED 1064device_bus_width=8 1065device_rowbuffer_size=1024 1066device_size=536870912 1067devices_per_rank=8 1068dll=true 1069eventq_index=0 1070in_addr_map=true | 1059IDD62=0.000000 1060VDD=1.500000 1061VDD2=0.000000 1062activation_limit=4 1063addr_mapping=RoRaBaCoCh 1064bank_groups_per_rank=0 1065banks_per_rank=8 1066burst_length=8 1067channels=1 1068clk_domain=system.clk_domain 1069conf_table_reported=true 1070default_p_state=UNDEFINED 1071device_bus_width=8 1072device_rowbuffer_size=1024 1073device_size=536870912 1074devices_per_rank=8 1075dll=true 1076eventq_index=0 1077in_addr_map=true |
| 1078kvm_map=true |
|
| 1071max_accesses_per_row=16 1072mem_sched_policy=frfcfs 1073min_writes_per_switch=16 1074null=false 1075p_state_clk_gate_bins=20 1076p_state_clk_gate_max=1000000000000 1077p_state_clk_gate_min=1000 1078page_policy=open_adaptive 1079power_model=Null | 1079max_accesses_per_row=16 1080mem_sched_policy=frfcfs 1081min_writes_per_switch=16 1082null=false 1083p_state_clk_gate_bins=20 1084p_state_clk_gate_max=1000000000000 1085p_state_clk_gate_min=1000 1086page_policy=open_adaptive 1087power_model=Null |
| 1080range=2147483648:2415919103 | 1088range=2147483648:2415919103:0:0:0:0 |
| 1081ranks_per_channel=2 1082read_buffer_size=32 1083static_backend_latency=10000 1084static_frontend_latency=10000 1085tBURST=5000 1086tCCD_L=0 1087tCK=1250 1088tCL=13750 --- 5 unchanged lines hidden (view full) --- 1094tRP=13750 1095tRRD=6000 1096tRRD_L=0 1097tRTP=7500 1098tRTW=2500 1099tWR=15000 1100tWTR=7500 1101tXAW=30000 | 1089ranks_per_channel=2 1090read_buffer_size=32 1091static_backend_latency=10000 1092static_frontend_latency=10000 1093tBURST=5000 1094tCCD_L=0 1095tCK=1250 1096tCL=13750 --- 5 unchanged lines hidden (view full) --- 1102tRP=13750 1103tRRD=6000 1104tRRD_L=0 1105tRTP=7500 1106tRTW=2500 1107tWR=15000 1108tWTR=7500 1109tXAW=30000 |
| 1102tXP=0 | 1110tXP=6000 |
| 1103tXPDLL=0 | 1111tXPDLL=0 |
| 1104tXS=0 | 1112tXS=270000 |
| 1105tXSDLL=0 1106write_buffer_size=64 1107write_high_thresh_perc=85 1108write_low_thresh_perc=50 1109port=system.membus.master[5] 1110 1111[system.realview] 1112type=RealView --- 336 unchanged lines hidden (view full) --- 1449type=Pl390 1450clk_domain=system.clk_domain 1451cpu_addr=738205696 1452cpu_pio_delay=10000 1453default_p_state=UNDEFINED 1454dist_addr=738201600 1455dist_pio_delay=10000 1456eventq_index=0 | 1113tXSDLL=0 1114write_buffer_size=64 1115write_high_thresh_perc=85 1116write_low_thresh_perc=50 1117port=system.membus.master[5] 1118 1119[system.realview] 1120type=RealView --- 336 unchanged lines hidden (view full) --- 1457type=Pl390 1458clk_domain=system.clk_domain 1459cpu_addr=738205696 1460cpu_pio_delay=10000 1461default_p_state=UNDEFINED 1462dist_addr=738201600 1463dist_pio_delay=10000 1464eventq_index=0 |
| 1457gem5_extensions=true | 1465gem5_extensions=false |
| 1458int_latency=10000 1459it_lines=128 1460p_state_clk_gate_bins=20 1461p_state_clk_gate_max=1000000000000 1462p_state_clk_gate_min=1000 1463platform=system.realview 1464power_model=Null 1465system=system --- 300 unchanged lines hidden (view full) --- 1766[system.realview.nvmem] 1767type=SimpleMemory 1768bandwidth=73.000000 1769clk_domain=system.clk_domain 1770conf_table_reported=false 1771default_p_state=UNDEFINED 1772eventq_index=0 1773in_addr_map=true | 1466int_latency=10000 1467it_lines=128 1468p_state_clk_gate_bins=20 1469p_state_clk_gate_max=1000000000000 1470p_state_clk_gate_min=1000 1471platform=system.realview 1472power_model=Null 1473system=system --- 300 unchanged lines hidden (view full) --- 1774[system.realview.nvmem] 1775type=SimpleMemory 1776bandwidth=73.000000 1777clk_domain=system.clk_domain 1778conf_table_reported=false 1779default_p_state=UNDEFINED 1780eventq_index=0 1781in_addr_map=true |
| 1782kvm_map=true |
|
| 1774latency=30000 1775latency_var=0 1776null=false 1777p_state_clk_gate_bins=20 1778p_state_clk_gate_max=1000000000000 1779p_state_clk_gate_min=1000 1780power_model=Null | 1783latency=30000 1784latency_var=0 1785null=false 1786p_state_clk_gate_bins=20 1787p_state_clk_gate_max=1000000000000 1788p_state_clk_gate_min=1000 1789power_model=Null |
| 1781range=0:67108863 | 1790range=0:67108863:0:0:0:0 |
| 1782port=system.membus.master[1] 1783 1784[system.realview.pci_host] 1785type=GenericPciHost 1786clk_domain=system.clk_domain 1787conf_base=805306368 1788conf_device_bits=16 1789conf_size=268435456 --- 214 unchanged lines hidden (view full) --- 2004[system.realview.vram] 2005type=SimpleMemory 2006bandwidth=73.000000 2007clk_domain=system.clk_domain 2008conf_table_reported=false 2009default_p_state=UNDEFINED 2010eventq_index=0 2011in_addr_map=true | 1791port=system.membus.master[1] 1792 1793[system.realview.pci_host] 1794type=GenericPciHost 1795clk_domain=system.clk_domain 1796conf_base=805306368 1797conf_device_bits=16 1798conf_size=268435456 --- 214 unchanged lines hidden (view full) --- 2013[system.realview.vram] 2014type=SimpleMemory 2015bandwidth=73.000000 2016clk_domain=system.clk_domain 2017conf_table_reported=false 2018default_p_state=UNDEFINED 2019eventq_index=0 2020in_addr_map=true |
| 2021kvm_map=true |
|
| 2012latency=30000 2013latency_var=0 2014null=false 2015p_state_clk_gate_bins=20 2016p_state_clk_gate_max=1000000000000 2017p_state_clk_gate_min=1000 2018power_model=Null | 2022latency=30000 2023latency_var=0 2024null=false 2025p_state_clk_gate_bins=20 2026p_state_clk_gate_max=1000000000000 2027p_state_clk_gate_min=1000 2028power_model=Null |
| 2019range=402653184:436207615 | 2029range=402653184:436207615:0:0:0:0 |
| 2020port=system.iobus.master[11] 2021 2022[system.realview.watchdog_fake] 2023type=AmbaFake 2024amba_id=0 2025clk_domain=system.clk_domain 2026default_p_state=UNDEFINED 2027eventq_index=0 --- 30 unchanged lines hidden --- | 2030port=system.iobus.master[11] 2031 2032[system.realview.watchdog_fake] 2033type=AmbaFake 2034amba_id=0 2035clk_domain=system.clk_domain 2036default_p_state=UNDEFINED 2037eventq_index=0 --- 30 unchanged lines hidden --- |