1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxArmSystem
13children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
14atags_addr=134217728
15boot_loader=/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm
16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
17cache_line_size=64
18clk_domain=system.clk_domain
19default_p_state=UNDEFINED
20dtb_filename=/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
21early_kernel_symbols=false
22enable_context_switch_stats_dump=false
23eventq_index=0
24exit_on_work_items=false
25flags_addr=469827632
26gic_cpu_addr=738205696
27have_large_asid_64=false
28have_lpae=true
29have_security=false
30have_virtualization=false
31highest_el_is_64=false
32init_param=0
33kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
34kernel_addr_check=true
35load_addr_mask=268435455
36load_offset=2147483648
37machine_type=VExpress_EMM
38mem_mode=timing
39mem_ranges=2147483648:2415919103:0:0:0:0
40memories=system.physmem system.realview.nvmem system.realview.vram
41mmap_using_noreserve=false
42multi_proc=true
43multi_thread=false
44num_work_ids=16
45p_state_clk_gate_bins=20
46p_state_clk_gate_max=1000000000000
47p_state_clk_gate_min=1000
48panic_on_oops=true
49panic_on_panic=true
50phys_addr_range_64=40
51power_model=Null
52readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
53reset_addr_64=0
54symbolfile=
55thermal_components=
56thermal_model=Null
57work_begin_ckpt_count=0
58work_begin_cpu_id_exit=-1
59work_begin_exit_count=0
60work_cpus_ckpt_count=0

--- 33 unchanged lines hidden (view full) ---

94eventq_index=0
95image_file=
96read_only=false
97table_size=65536
98
99[system.cf0.image.child]
100type=RawDiskImage
101eventq_index=0
102image_file=/arm/projectscratch/randd/systems/dist/disks/linux-aarch32-ael.img
103read_only=true
104
105[system.clk_domain]
106type=SrcClockDomain
107clock=1000
108domain_id=-1
109eventq_index=0
110init_perf_level=0

--- 59 unchanged lines hidden (view full) ---

170p_state_clk_gate_max=1000000000000
171p_state_clk_gate_min=1000
172power_model=Null
173profile=0
174progress_interval=0
175simpoint_start_insts=
176socket_id=0
177switched_out=false
178system=system
179threadPolicy=RoundRobin
180tracer=system.cpu.tracer
181workload=
182dcache_port=system.cpu.dcache.cpu_side
183icache_port=system.cpu.icache.cpu_side
184
185[system.cpu.branchPred]

--- 21 unchanged lines hidden (view full) ---

207
208[system.cpu.dcache]
209type=Cache
210children=tags
211addr_ranges=0:18446744073709551615:0:0:0:0
212assoc=4
213clk_domain=system.cpu_clk_domain
214clusivity=mostly_incl
215default_p_state=UNDEFINED
216demand_mshr_reserve=1
217eventq_index=0
218hit_latency=2
219is_read_only=false
220max_miss_count=0
221mshrs=4
222p_state_clk_gate_bins=20
223p_state_clk_gate_max=1000000000000
224p_state_clk_gate_min=1000
225power_model=Null
226prefetch_on_access=false
227prefetcher=Null
228response_latency=2
229sequential_access=false
230size=32768
231system=system
232tags=system.cpu.dcache.tags
233tgts_per_mshr=20
234write_buffers=8
235writeback_clean=false
236cpu_side=system.cpu.dcache_port
237mem_side=system.cpu.toL2Bus.slave[1]
238
239[system.cpu.dcache.tags]
240type=LRU
241assoc=4
242block_size=64
243clk_domain=system.cpu_clk_domain
244default_p_state=UNDEFINED
245eventq_index=0
246hit_latency=2
247p_state_clk_gate_bins=20
248p_state_clk_gate_max=1000000000000
249p_state_clk_gate_min=1000
250power_model=Null
251sequential_access=false
252size=32768
253
254[system.cpu.dstage2_mmu]
255type=ArmStage2MMU
256children=stage2_tlb
257eventq_index=0
258stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
259sys=system
260tlb=system.cpu.dtb

--- 195 unchanged lines hidden (view full) ---

456eventq_index=0
457issueLat=1
458opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
459opLat=6
460timings=system.cpu.executeFuncUnits.funcUnits4.timings
461
462[system.cpu.executeFuncUnits.funcUnits4.opClasses]
463type=MinorOpClassSet
464children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
465eventq_index=0
466opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25
467
468[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
469type=MinorOpClass
470eventq_index=0
471opClass=FloatAdd
472
473[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
474type=MinorOpClass
475eventq_index=0
476opClass=FloatCmp
477
478[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
479type=MinorOpClass
480eventq_index=0
481opClass=FloatCvt
482
483[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
484type=MinorOpClass
485eventq_index=0
486opClass=FloatMult
487
488[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
489type=MinorOpClass
490eventq_index=0
491opClass=FloatDiv
492
493[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
494type=MinorOpClass
495eventq_index=0
496opClass=FloatSqrt
497
498[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
499type=MinorOpClass
500eventq_index=0
501opClass=SimdAdd
502
503[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
504type=MinorOpClass
505eventq_index=0
506opClass=SimdAddAcc
507
508[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
509type=MinorOpClass
510eventq_index=0
511opClass=SimdAlu
512
513[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
514type=MinorOpClass
515eventq_index=0
516opClass=SimdCmp
517
518[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
519type=MinorOpClass
520eventq_index=0
521opClass=SimdCvt
522
523[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
524type=MinorOpClass
525eventq_index=0
526opClass=SimdMisc
527
528[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
529type=MinorOpClass
530eventq_index=0
531opClass=SimdMult
532
533[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
534type=MinorOpClass
535eventq_index=0
536opClass=SimdMultAcc
537
538[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
539type=MinorOpClass
540eventq_index=0
541opClass=SimdShift
542
543[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
544type=MinorOpClass
545eventq_index=0
546opClass=SimdShiftAcc
547
548[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
549type=MinorOpClass
550eventq_index=0
551opClass=SimdSqrt
552
553[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
554type=MinorOpClass
555eventq_index=0
556opClass=SimdFloatAdd
557
558[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
559type=MinorOpClass
560eventq_index=0
561opClass=SimdFloatAlu
562
563[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
564type=MinorOpClass
565eventq_index=0
566opClass=SimdFloatCmp
567
568[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
569type=MinorOpClass
570eventq_index=0
571opClass=SimdFloatCvt
572
573[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
574type=MinorOpClass
575eventq_index=0
576opClass=SimdFloatDiv
577
578[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
579type=MinorOpClass
580eventq_index=0
581opClass=SimdFloatMisc
582
583[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
584type=MinorOpClass
585eventq_index=0
586opClass=SimdFloatMult
587
588[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
589type=MinorOpClass
590eventq_index=0
591opClass=SimdFloatMultAcc
592
593[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
594type=MinorOpClass
595eventq_index=0
596opClass=SimdFloatSqrt
597
598[system.cpu.executeFuncUnits.funcUnits4.timings]
599type=MinorFUTiming
600children=opClasses
601description=FloatSimd
602eventq_index=0
603extraAssumedLat=0

--- 17 unchanged lines hidden (view full) ---

621eventq_index=0
622issueLat=1
623opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
624opLat=1
625timings=system.cpu.executeFuncUnits.funcUnits5.timings
626
627[system.cpu.executeFuncUnits.funcUnits5.opClasses]
628type=MinorOpClassSet
629children=opClasses0 opClasses1
630eventq_index=0
631opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1
632
633[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
634type=MinorOpClass
635eventq_index=0
636opClass=MemRead
637
638[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
639type=MinorOpClass
640eventq_index=0
641opClass=MemWrite
642
643[system.cpu.executeFuncUnits.funcUnits5.timings]
644type=MinorFUTiming
645children=opClasses
646description=Mem
647eventq_index=0
648extraAssumedLat=2
649extraCommitLat=0
650extraCommitLatExpr=Null

--- 36 unchanged lines hidden (view full) ---

687
688[system.cpu.icache]
689type=Cache
690children=tags
691addr_ranges=0:18446744073709551615:0:0:0:0
692assoc=1
693clk_domain=system.cpu_clk_domain
694clusivity=mostly_incl
695default_p_state=UNDEFINED
696demand_mshr_reserve=1
697eventq_index=0
698hit_latency=2
699is_read_only=true
700max_miss_count=0
701mshrs=4
702p_state_clk_gate_bins=20
703p_state_clk_gate_max=1000000000000
704p_state_clk_gate_min=1000
705power_model=Null
706prefetch_on_access=false
707prefetcher=Null
708response_latency=2
709sequential_access=false
710size=32768
711system=system
712tags=system.cpu.icache.tags
713tgts_per_mshr=20
714write_buffers=8
715writeback_clean=true
716cpu_side=system.cpu.icache_port
717mem_side=system.cpu.toL2Bus.slave[0]
718
719[system.cpu.icache.tags]
720type=LRU
721assoc=1
722block_size=64
723clk_domain=system.cpu_clk_domain
724default_p_state=UNDEFINED
725eventq_index=0
726hit_latency=2
727p_state_clk_gate_bins=20
728p_state_clk_gate_max=1000000000000
729p_state_clk_gate_min=1000
730power_model=Null
731sequential_access=false
732size=32768
733
734[system.cpu.interrupts]
735type=ArmInterrupts
736eventq_index=0
737
738[system.cpu.isa]
739type=ArmISA
740decoderFlavour=Generic
741eventq_index=0
742fpsid=1090793632
743id_aa64afr0_el1=0
744id_aa64afr1_el1=0
745id_aa64dfr0_el1=1052678
746id_aa64dfr1_el1=0
747id_aa64isar0_el1=0
748id_aa64isar1_el1=0
749id_aa64mmfr0_el1=15728642
750id_aa64mmfr1_el1=0
751id_aa64pfr0_el1=34
752id_aa64pfr1_el1=0
753id_isar0=34607377
754id_isar1=34677009
755id_isar2=555950401
756id_isar3=17899825
757id_isar4=268501314
758id_isar5=0
759id_mmfr0=270536963
760id_mmfr1=0
761id_mmfr2=19070976
762id_mmfr3=34611729
763id_pfr0=49
764id_pfr1=4113
765midr=1091551472
766pmu=Null
767system=system
768
769[system.cpu.istage2_mmu]
770type=ArmStage2MMU
771children=stage2_tlb
772eventq_index=0

--- 46 unchanged lines hidden (view full) ---

819
820[system.cpu.l2cache]
821type=Cache
822children=tags
823addr_ranges=0:18446744073709551615:0:0:0:0
824assoc=8
825clk_domain=system.cpu_clk_domain
826clusivity=mostly_incl
827default_p_state=UNDEFINED
828demand_mshr_reserve=1
829eventq_index=0
830hit_latency=20
831is_read_only=false
832max_miss_count=0
833mshrs=20
834p_state_clk_gate_bins=20
835p_state_clk_gate_max=1000000000000
836p_state_clk_gate_min=1000
837power_model=Null
838prefetch_on_access=false
839prefetcher=Null
840response_latency=20
841sequential_access=false
842size=4194304
843system=system
844tags=system.cpu.l2cache.tags
845tgts_per_mshr=12
846write_buffers=8
847writeback_clean=false
848cpu_side=system.cpu.toL2Bus.master[0]
849mem_side=system.membus.slave[2]
850
851[system.cpu.l2cache.tags]
852type=LRU
853assoc=8
854block_size=64
855clk_domain=system.cpu_clk_domain
856default_p_state=UNDEFINED
857eventq_index=0
858hit_latency=20
859p_state_clk_gate_bins=20
860p_state_clk_gate_max=1000000000000
861p_state_clk_gate_min=1000
862power_model=Null
863sequential_access=false
864size=4194304
865
866[system.cpu.toL2Bus]
867type=CoherentXBar
868children=snoop_filter
869clk_domain=system.cpu_clk_domain
870default_p_state=UNDEFINED
871eventq_index=0
872forward_latency=0

--- 63 unchanged lines hidden (view full) ---

936
937[system.iocache]
938type=Cache
939children=tags
940addr_ranges=2147483648:2415919103:0:0:0:0
941assoc=8
942clk_domain=system.clk_domain
943clusivity=mostly_incl
944default_p_state=UNDEFINED
945demand_mshr_reserve=1
946eventq_index=0
947hit_latency=50
948is_read_only=false
949max_miss_count=0
950mshrs=20
951p_state_clk_gate_bins=20
952p_state_clk_gate_max=1000000000000
953p_state_clk_gate_min=1000
954power_model=Null
955prefetch_on_access=false
956prefetcher=Null
957response_latency=50
958sequential_access=false
959size=1024
960system=system
961tags=system.iocache.tags
962tgts_per_mshr=12
963write_buffers=8
964writeback_clean=false
965cpu_side=system.iobus.master[25]
966mem_side=system.membus.slave[3]
967
968[system.iocache.tags]
969type=LRU
970assoc=8
971block_size=64
972clk_domain=system.clk_domain
973default_p_state=UNDEFINED
974eventq_index=0
975hit_latency=50
976p_state_clk_gate_bins=20
977p_state_clk_gate_max=1000000000000
978p_state_clk_gate_min=1000
979power_model=Null
980sequential_access=false
981size=1024
982
983[system.membus]
984type=CoherentXBar
985children=badaddr_responder snoop_filter
986clk_domain=system.clk_domain
987default_p_state=UNDEFINED
988eventq_index=0
989forward_latency=4

--- 1078 unchanged lines hidden ---