7,11c7,11
< host_inst_rate 172654 # Simulator instruction rate (inst/s)
< host_op_rate 209070 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 3861033235 # Simulator tick rate (ticks/s)
< host_mem_usage 617124 # Number of bytes of host memory used
< host_seconds 737.43 # Real time elapsed on the host
---
> host_inst_rate 111277 # Simulator instruction rate (inst/s)
> host_op_rate 134747 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 2488466073 # Simulator tick rate (ticks/s)
> host_mem_usage 617520 # Number of bytes of host memory used
> host_seconds 1144.17 # Real time elapsed on the host
444c444
< system.cpu0.dtb.read_hits 17339980 # DTB read hits
---
> system.cpu0.dtb.read_hits 17339981 # DTB read hits
446c446
< system.cpu0.dtb.write_hits 14540399 # DTB write hits
---
> system.cpu0.dtb.write_hits 14540400 # DTB write hits
457,458c457,458
< system.cpu0.dtb.read_accesses 17401921 # DTB read accesses
< system.cpu0.dtb.write_accesses 14546878 # DTB write accesses
---
> system.cpu0.dtb.read_accesses 17401922 # DTB read accesses
> system.cpu0.dtb.write_accesses 14546879 # DTB write accesses
460c460
< system.cpu0.dtb.hits 31880379 # DTB hits
---
> system.cpu0.dtb.hits 31880381 # DTB hits
462c462
< system.cpu0.dtb.accesses 31948799 # DTB accesses
---
> system.cpu0.dtb.accesses 31948801 # DTB accesses
596c596
< system.cpu0.dcache.tags.total_refs 30394668 # Total number of references to valid blocks.
---
> system.cpu0.dcache.tags.total_refs 30394670 # Total number of references to valid blocks.
598c598
< system.cpu0.dcache.tags.avg_refs 42.471890 # Average number of references to valid blocks.
---
> system.cpu0.dcache.tags.avg_refs 42.471892 # Average number of references to valid blocks.
608,613c608,613
< system.cpu0.dcache.tags.tag_accesses 63780149 # Number of tag accesses
< system.cpu0.dcache.tags.data_accesses 63780149 # Number of data accesses
< system.cpu0.dcache.ReadReq_hits::cpu0.data 15810331 # number of ReadReq hits
< system.cpu0.dcache.ReadReq_hits::total 15810331 # number of ReadReq hits
< system.cpu0.dcache.WriteReq_hits::cpu0.data 13424811 # number of WriteReq hits
< system.cpu0.dcache.WriteReq_hits::total 13424811 # number of WriteReq hits
---
> system.cpu0.dcache.tags.tag_accesses 63780153 # Number of tag accesses
> system.cpu0.dcache.tags.data_accesses 63780153 # Number of data accesses
> system.cpu0.dcache.ReadReq_hits::cpu0.data 15810332 # number of ReadReq hits
> system.cpu0.dcache.ReadReq_hits::total 15810332 # number of ReadReq hits
> system.cpu0.dcache.WriteReq_hits::cpu0.data 13424812 # number of WriteReq hits
> system.cpu0.dcache.WriteReq_hits::total 13424812 # number of WriteReq hits
620,623c620,623
< system.cpu0.dcache.demand_hits::cpu0.data 29235142 # number of demand (read+write) hits
< system.cpu0.dcache.demand_hits::total 29235142 # number of demand (read+write) hits
< system.cpu0.dcache.overall_hits::cpu0.data 29555582 # number of overall hits
< system.cpu0.dcache.overall_hits::total 29555582 # number of overall hits
---
> system.cpu0.dcache.demand_hits::cpu0.data 29235144 # number of demand (read+write) hits
> system.cpu0.dcache.demand_hits::total 29235144 # number of demand (read+write) hits
> system.cpu0.dcache.overall_hits::cpu0.data 29555584 # number of overall hits
> system.cpu0.dcache.overall_hits::total 29555584 # number of overall hits
652,655c652,655
< system.cpu0.dcache.ReadReq_accesses::cpu0.data 16274054 # number of ReadReq accesses(hits+misses)
< system.cpu0.dcache.ReadReq_accesses::total 16274054 # number of ReadReq accesses(hits+misses)
< system.cpu0.dcache.WriteReq_accesses::cpu0.data 14005712 # number of WriteReq accesses(hits+misses)
< system.cpu0.dcache.WriteReq_accesses::total 14005712 # number of WriteReq accesses(hits+misses)
---
> system.cpu0.dcache.ReadReq_accesses::cpu0.data 16274055 # number of ReadReq accesses(hits+misses)
> system.cpu0.dcache.ReadReq_accesses::total 16274055 # number of ReadReq accesses(hits+misses)
> system.cpu0.dcache.WriteReq_accesses::cpu0.data 14005713 # number of WriteReq accesses(hits+misses)
> system.cpu0.dcache.WriteReq_accesses::total 14005713 # number of WriteReq accesses(hits+misses)
662,665c662,665
< system.cpu0.dcache.demand_accesses::cpu0.data 30279766 # number of demand (read+write) accesses
< system.cpu0.dcache.demand_accesses::total 30279766 # number of demand (read+write) accesses
< system.cpu0.dcache.overall_accesses::cpu0.data 30736689 # number of overall (read+write) accesses
< system.cpu0.dcache.overall_accesses::total 30736689 # number of overall (read+write) accesses
---
> system.cpu0.dcache.demand_accesses::cpu0.data 30279768 # number of demand (read+write) accesses
> system.cpu0.dcache.demand_accesses::total 30279768 # number of demand (read+write) accesses
> system.cpu0.dcache.overall_accesses::cpu0.data 30736691 # number of overall (read+write) accesses
> system.cpu0.dcache.overall_accesses::total 30736691 # number of overall (read+write) accesses