1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
14atags_addr=256 15boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
| 14atags_addr=134217728 15boot_loader=/dist/binaries/boot_emm.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
17boot_release_addr=65528 18cache_line_size=64 19clk_domain=system.clk_domain
| 17boot_release_addr=65528 18cache_line_size=64 19clk_domain=system.clk_domain
|
20dtb_filename=
| 20dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
|
21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0
| 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0
|
24flags_addr=268435504 25gic_cpu_addr=520093952
| 24flags_addr=469827632 25gic_cpu_addr=738205696
|
26have_generic_timer=false 27have_large_asid_64=false 28have_lpae=false 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0
| 26have_generic_timer=false 27have_large_asid_64=false 28have_lpae=false 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0
|
33kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
| 33kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
34kernel_addr_check=true 35load_addr_mask=268435455
| 34kernel_addr_check=true 35load_addr_mask=268435455
|
36load_offset=0 37machine_type=RealView_PBX
| 36load_offset=2147483648 37machine_type=VExpress_EMM
|
38mem_mode=timing
| 38mem_mode=timing
|
39mem_ranges=0:134217727 40memories=system.physmem system.realview.nvmem
| 39mem_ranges=2147483648:2415919103 40memories=system.realview.vram system.physmem system.realview.nvmem
|
41multi_proc=true 42num_work_ids=16 43panic_on_oops=true 44panic_on_panic=true 45phys_addr_range_64=40
| 41multi_proc=true 42num_work_ids=16 43panic_on_oops=true 44panic_on_panic=true 45phys_addr_range_64=40
|
46readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
| 46readfile=/work/gem5.latest/tests/halt.sh
|
47reset_addr_64=0 48symbolfile= 49work_begin_ckpt_count=0 50work_begin_cpu_id_exit=-1 51work_begin_exit_count=0 52work_cpus_ckpt_count=0 53work_end_ckpt_count=0 54work_end_exit_count=0 55work_item_id=-1
| 47reset_addr_64=0 48symbolfile= 49work_begin_ckpt_count=0 50work_begin_cpu_id_exit=-1 51work_begin_exit_count=0 52work_cpus_ckpt_count=0 53work_end_ckpt_count=0 54work_end_exit_count=0 55work_item_id=-1
|
56system_port=system.membus.slave[0]
| 56system_port=system.membus.slave[1]
|
57 58[system.bridge] 59type=Bridge 60clk_domain=system.clk_domain 61delay=50000 62eventq_index=0
| 57 58[system.bridge] 59type=Bridge 60clk_domain=system.clk_domain 61delay=50000 62eventq_index=0
|
63ranges=268435456:520093695 1073741824:1610612735
| 63ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
64req_size=16 65resp_size=16 66master=system.iobus.slave[0] 67slave=system.membus.master[0] 68 69[system.cf0] 70type=IdeDisk 71children=image 72delay=1000000 73driveID=master 74eventq_index=0 75image=system.cf0.image 76 77[system.cf0.image] 78type=CowDiskImage 79children=child 80child=system.cf0.image.child 81eventq_index=0 82image_file= 83read_only=false 84table_size=65536 85 86[system.cf0.image.child] 87type=RawDiskImage 88eventq_index=0
| 64req_size=16 65resp_size=16 66master=system.iobus.slave[0] 67slave=system.membus.master[0] 68 69[system.cf0] 70type=IdeDisk 71children=image 72delay=1000000 73driveID=master 74eventq_index=0 75image=system.cf0.image 76 77[system.cf0.image] 78type=CowDiskImage 79children=child 80child=system.cf0.image.child 81eventq_index=0 82image_file= 83read_only=false 84table_size=65536 85 86[system.cf0.image.child] 87type=RawDiskImage 88eventq_index=0
|
89image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
| 89image_file=/dist/disks/linux-aarch32-ael.img
|
90read_only=true 91 92[system.clk_domain] 93type=SrcClockDomain 94clock=1000 95domain_id=-1 96eventq_index=0 97init_perf_level=0 98voltage_domain=system.voltage_domain 99 100[system.cpu0] 101type=MinorCPU 102children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 103branchPred=system.cpu0.branchPred 104checker=Null 105clk_domain=system.cpu_clk_domain 106cpu_id=0 107decodeCycleInput=true 108decodeInputBufferSize=3 109decodeInputWidth=2 110decodeToExecuteForwardDelay=1 111do_checkpoint_insts=true 112do_quiesce=true 113do_statistics_insts=true 114dstage2_mmu=system.cpu0.dstage2_mmu 115dtb=system.cpu0.dtb 116enableIdling=true 117eventq_index=0 118executeAllowEarlyMemoryIssue=true 119executeBranchDelay=1 120executeCommitLimit=2 121executeCycleInput=true 122executeFuncUnits=system.cpu0.executeFuncUnits 123executeInputBufferSize=7 124executeInputWidth=2 125executeIssueLimit=2 126executeLSQMaxStoreBufferStoresPerCycle=2 127executeLSQRequestsQueueSize=1 128executeLSQStoreBufferSize=5 129executeLSQTransfersQueueSize=2 130executeMaxAccessesInMemory=2 131executeMemoryCommitLimit=1 132executeMemoryIssueLimit=1 133executeMemoryWidth=0 134executeSetTraceTimeOnCommit=true 135executeSetTraceTimeOnIssue=false 136fetch1FetchLimit=1 137fetch1LineSnapWidth=0 138fetch1LineWidth=0 139fetch1ToFetch2BackwardDelay=1 140fetch1ToFetch2ForwardDelay=1 141fetch2CycleInput=true 142fetch2InputBufferSize=2 143fetch2ToDecodeForwardDelay=1 144function_trace=false 145function_trace_start=0 146interrupts=system.cpu0.interrupts 147isa=system.cpu0.isa 148istage2_mmu=system.cpu0.istage2_mmu 149itb=system.cpu0.itb 150max_insts_all_threads=0 151max_insts_any_thread=0 152max_loads_all_threads=0 153max_loads_any_thread=0 154numThreads=1 155profile=0 156progress_interval=0 157simpoint_start_insts= 158socket_id=0 159switched_out=false 160system=system 161tracer=system.cpu0.tracer 162workload= 163dcache_port=system.cpu0.dcache.cpu_side 164icache_port=system.cpu0.icache.cpu_side 165 166[system.cpu0.branchPred] 167type=BranchPredictor 168BTBEntries=4096 169BTBTagSize=16 170RASSize=16 171choiceCtrBits=2 172choicePredictorSize=8192 173eventq_index=0 174globalCtrBits=2 175globalPredictorSize=8192 176instShiftAmt=2 177localCtrBits=2 178localHistoryTableSize=2048 179localPredictorSize=2048 180numThreads=1 181predType=tournament 182 183[system.cpu0.dcache] 184type=BaseCache 185children=tags 186addr_ranges=0:18446744073709551615 187assoc=2 188clk_domain=system.cpu_clk_domain 189eventq_index=0 190forward_snoops=true 191hit_latency=2 192is_top_level=true 193max_miss_count=0 194mshrs=6 195prefetch_on_access=false 196prefetcher=Null 197response_latency=2 198sequential_access=false 199size=32768 200system=system 201tags=system.cpu0.dcache.tags 202tgts_per_mshr=8 203two_queue=false 204write_buffers=16 205cpu_side=system.cpu0.dcache_port 206mem_side=system.cpu0.toL2Bus.slave[1] 207 208[system.cpu0.dcache.tags] 209type=LRU 210assoc=2 211block_size=64 212clk_domain=system.cpu_clk_domain 213eventq_index=0 214hit_latency=2 215sequential_access=false 216size=32768 217 218[system.cpu0.dstage2_mmu] 219type=ArmStage2MMU 220children=stage2_tlb 221eventq_index=0 222stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 223tlb=system.cpu0.dtb 224 225[system.cpu0.dstage2_mmu.stage2_tlb] 226type=ArmTLB 227children=walker 228eventq_index=0 229is_stage2=true 230size=32 231walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 232 233[system.cpu0.dstage2_mmu.stage2_tlb.walker] 234type=ArmTableWalker 235clk_domain=system.cpu_clk_domain 236eventq_index=0 237is_stage2=true 238num_squash_per_cycle=2 239sys=system 240port=system.cpu0.toL2Bus.slave[5] 241 242[system.cpu0.dtb] 243type=ArmTLB 244children=walker 245eventq_index=0 246is_stage2=false 247size=64 248walker=system.cpu0.dtb.walker 249 250[system.cpu0.dtb.walker] 251type=ArmTableWalker 252clk_domain=system.cpu_clk_domain 253eventq_index=0 254is_stage2=false 255num_squash_per_cycle=2 256sys=system 257port=system.cpu0.toL2Bus.slave[3] 258 259[system.cpu0.executeFuncUnits] 260type=MinorFUPool 261children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 262eventq_index=0 263funcUnits=system.cpu0.executeFuncUnits.funcUnits0 system.cpu0.executeFuncUnits.funcUnits1 system.cpu0.executeFuncUnits.funcUnits2 system.cpu0.executeFuncUnits.funcUnits3 system.cpu0.executeFuncUnits.funcUnits4 system.cpu0.executeFuncUnits.funcUnits5 system.cpu0.executeFuncUnits.funcUnits6 264 265[system.cpu0.executeFuncUnits.funcUnits0] 266type=MinorFU 267children=opClasses timings 268cantForwardFromFUIndices= 269eventq_index=0 270issueLat=1 271opClasses=system.cpu0.executeFuncUnits.funcUnits0.opClasses 272opLat=3 273timings=system.cpu0.executeFuncUnits.funcUnits0.timings 274 275[system.cpu0.executeFuncUnits.funcUnits0.opClasses] 276type=MinorOpClassSet 277children=opClasses 278eventq_index=0 279opClasses=system.cpu0.executeFuncUnits.funcUnits0.opClasses.opClasses 280 281[system.cpu0.executeFuncUnits.funcUnits0.opClasses.opClasses] 282type=MinorOpClass 283eventq_index=0 284opClass=IntAlu 285 286[system.cpu0.executeFuncUnits.funcUnits0.timings] 287type=MinorFUTiming 288children=opClasses 289description=Int 290eventq_index=0 291extraAssumedLat=0 292extraCommitLat=0 293extraCommitLatExpr=Null 294mask=0 295match=0 296opClasses=system.cpu0.executeFuncUnits.funcUnits0.timings.opClasses 297srcRegsRelativeLats=2 298suppress=false 299 300[system.cpu0.executeFuncUnits.funcUnits0.timings.opClasses] 301type=MinorOpClassSet 302eventq_index=0 303opClasses= 304 305[system.cpu0.executeFuncUnits.funcUnits1] 306type=MinorFU 307children=opClasses timings 308cantForwardFromFUIndices= 309eventq_index=0 310issueLat=1 311opClasses=system.cpu0.executeFuncUnits.funcUnits1.opClasses 312opLat=3 313timings=system.cpu0.executeFuncUnits.funcUnits1.timings 314 315[system.cpu0.executeFuncUnits.funcUnits1.opClasses] 316type=MinorOpClassSet 317children=opClasses 318eventq_index=0 319opClasses=system.cpu0.executeFuncUnits.funcUnits1.opClasses.opClasses 320 321[system.cpu0.executeFuncUnits.funcUnits1.opClasses.opClasses] 322type=MinorOpClass 323eventq_index=0 324opClass=IntAlu 325 326[system.cpu0.executeFuncUnits.funcUnits1.timings] 327type=MinorFUTiming 328children=opClasses 329description=Int 330eventq_index=0 331extraAssumedLat=0 332extraCommitLat=0 333extraCommitLatExpr=Null 334mask=0 335match=0 336opClasses=system.cpu0.executeFuncUnits.funcUnits1.timings.opClasses 337srcRegsRelativeLats=2 338suppress=false 339 340[system.cpu0.executeFuncUnits.funcUnits1.timings.opClasses] 341type=MinorOpClassSet 342eventq_index=0 343opClasses= 344 345[system.cpu0.executeFuncUnits.funcUnits2] 346type=MinorFU 347children=opClasses timings 348cantForwardFromFUIndices= 349eventq_index=0 350issueLat=1 351opClasses=system.cpu0.executeFuncUnits.funcUnits2.opClasses 352opLat=3 353timings=system.cpu0.executeFuncUnits.funcUnits2.timings 354 355[system.cpu0.executeFuncUnits.funcUnits2.opClasses] 356type=MinorOpClassSet 357children=opClasses 358eventq_index=0 359opClasses=system.cpu0.executeFuncUnits.funcUnits2.opClasses.opClasses 360 361[system.cpu0.executeFuncUnits.funcUnits2.opClasses.opClasses] 362type=MinorOpClass 363eventq_index=0 364opClass=IntMult 365 366[system.cpu0.executeFuncUnits.funcUnits2.timings] 367type=MinorFUTiming 368children=opClasses 369description=Mul 370eventq_index=0 371extraAssumedLat=0 372extraCommitLat=0 373extraCommitLatExpr=Null 374mask=0 375match=0 376opClasses=system.cpu0.executeFuncUnits.funcUnits2.timings.opClasses 377srcRegsRelativeLats=0 378suppress=false 379 380[system.cpu0.executeFuncUnits.funcUnits2.timings.opClasses] 381type=MinorOpClassSet 382eventq_index=0 383opClasses= 384 385[system.cpu0.executeFuncUnits.funcUnits3] 386type=MinorFU 387children=opClasses 388cantForwardFromFUIndices= 389eventq_index=0 390issueLat=9 391opClasses=system.cpu0.executeFuncUnits.funcUnits3.opClasses 392opLat=9 393timings= 394 395[system.cpu0.executeFuncUnits.funcUnits3.opClasses] 396type=MinorOpClassSet 397children=opClasses 398eventq_index=0 399opClasses=system.cpu0.executeFuncUnits.funcUnits3.opClasses.opClasses 400 401[system.cpu0.executeFuncUnits.funcUnits3.opClasses.opClasses] 402type=MinorOpClass 403eventq_index=0 404opClass=IntDiv 405 406[system.cpu0.executeFuncUnits.funcUnits4] 407type=MinorFU 408children=opClasses timings 409cantForwardFromFUIndices= 410eventq_index=0 411issueLat=1 412opClasses=system.cpu0.executeFuncUnits.funcUnits4.opClasses 413opLat=6 414timings=system.cpu0.executeFuncUnits.funcUnits4.timings 415 416[system.cpu0.executeFuncUnits.funcUnits4.opClasses] 417type=MinorOpClassSet 418children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 419eventq_index=0 420opClasses=system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses25 421 422[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses00] 423type=MinorOpClass 424eventq_index=0 425opClass=FloatAdd 426 427[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses01] 428type=MinorOpClass 429eventq_index=0 430opClass=FloatCmp 431 432[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses02] 433type=MinorOpClass 434eventq_index=0 435opClass=FloatCvt 436 437[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses03] 438type=MinorOpClass 439eventq_index=0 440opClass=FloatMult 441 442[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses04] 443type=MinorOpClass 444eventq_index=0 445opClass=FloatDiv 446 447[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses05] 448type=MinorOpClass 449eventq_index=0 450opClass=FloatSqrt 451 452[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses06] 453type=MinorOpClass 454eventq_index=0 455opClass=SimdAdd 456 457[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses07] 458type=MinorOpClass 459eventq_index=0 460opClass=SimdAddAcc 461 462[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses08] 463type=MinorOpClass 464eventq_index=0 465opClass=SimdAlu 466 467[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses09] 468type=MinorOpClass 469eventq_index=0 470opClass=SimdCmp 471 472[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses10] 473type=MinorOpClass 474eventq_index=0 475opClass=SimdCvt 476 477[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses11] 478type=MinorOpClass 479eventq_index=0 480opClass=SimdMisc 481 482[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses12] 483type=MinorOpClass 484eventq_index=0 485opClass=SimdMult 486 487[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses13] 488type=MinorOpClass 489eventq_index=0 490opClass=SimdMultAcc 491 492[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses14] 493type=MinorOpClass 494eventq_index=0 495opClass=SimdShift 496 497[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses15] 498type=MinorOpClass 499eventq_index=0 500opClass=SimdShiftAcc 501 502[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses16] 503type=MinorOpClass 504eventq_index=0 505opClass=SimdSqrt 506 507[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses17] 508type=MinorOpClass 509eventq_index=0 510opClass=SimdFloatAdd 511 512[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses18] 513type=MinorOpClass 514eventq_index=0 515opClass=SimdFloatAlu 516 517[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses19] 518type=MinorOpClass 519eventq_index=0 520opClass=SimdFloatCmp 521 522[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses20] 523type=MinorOpClass 524eventq_index=0 525opClass=SimdFloatCvt 526 527[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses21] 528type=MinorOpClass 529eventq_index=0 530opClass=SimdFloatDiv 531 532[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses22] 533type=MinorOpClass 534eventq_index=0 535opClass=SimdFloatMisc 536 537[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses23] 538type=MinorOpClass 539eventq_index=0 540opClass=SimdFloatMult 541 542[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses24] 543type=MinorOpClass 544eventq_index=0 545opClass=SimdFloatMultAcc 546 547[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses25] 548type=MinorOpClass 549eventq_index=0 550opClass=SimdFloatSqrt 551 552[system.cpu0.executeFuncUnits.funcUnits4.timings] 553type=MinorFUTiming 554children=opClasses 555description=FloatSimd 556eventq_index=0 557extraAssumedLat=0 558extraCommitLat=0 559extraCommitLatExpr=Null 560mask=0 561match=0 562opClasses=system.cpu0.executeFuncUnits.funcUnits4.timings.opClasses 563srcRegsRelativeLats=2 564suppress=false 565 566[system.cpu0.executeFuncUnits.funcUnits4.timings.opClasses] 567type=MinorOpClassSet 568eventq_index=0 569opClasses= 570 571[system.cpu0.executeFuncUnits.funcUnits5] 572type=MinorFU 573children=opClasses timings 574cantForwardFromFUIndices= 575eventq_index=0 576issueLat=1 577opClasses=system.cpu0.executeFuncUnits.funcUnits5.opClasses 578opLat=1 579timings=system.cpu0.executeFuncUnits.funcUnits5.timings 580 581[system.cpu0.executeFuncUnits.funcUnits5.opClasses] 582type=MinorOpClassSet 583children=opClasses0 opClasses1 584eventq_index=0 585opClasses=system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses1 586 587[system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses0] 588type=MinorOpClass 589eventq_index=0 590opClass=MemRead 591 592[system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses1] 593type=MinorOpClass 594eventq_index=0 595opClass=MemWrite 596 597[system.cpu0.executeFuncUnits.funcUnits5.timings] 598type=MinorFUTiming 599children=opClasses 600description=Mem 601eventq_index=0 602extraAssumedLat=2 603extraCommitLat=0 604extraCommitLatExpr=Null 605mask=0 606match=0 607opClasses=system.cpu0.executeFuncUnits.funcUnits5.timings.opClasses 608srcRegsRelativeLats=1 609suppress=false 610 611[system.cpu0.executeFuncUnits.funcUnits5.timings.opClasses] 612type=MinorOpClassSet 613eventq_index=0 614opClasses= 615 616[system.cpu0.executeFuncUnits.funcUnits6] 617type=MinorFU 618children=opClasses 619cantForwardFromFUIndices= 620eventq_index=0 621issueLat=1 622opClasses=system.cpu0.executeFuncUnits.funcUnits6.opClasses 623opLat=1 624timings= 625 626[system.cpu0.executeFuncUnits.funcUnits6.opClasses] 627type=MinorOpClassSet 628children=opClasses0 opClasses1 629eventq_index=0 630opClasses=system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses1 631 632[system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses0] 633type=MinorOpClass 634eventq_index=0 635opClass=IprAccess 636 637[system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses1] 638type=MinorOpClass 639eventq_index=0 640opClass=InstPrefetch 641 642[system.cpu0.icache] 643type=BaseCache 644children=tags 645addr_ranges=0:18446744073709551615 646assoc=2 647clk_domain=system.cpu_clk_domain 648eventq_index=0 649forward_snoops=true 650hit_latency=1 651is_top_level=true 652max_miss_count=0 653mshrs=2 654prefetch_on_access=false 655prefetcher=Null 656response_latency=1 657sequential_access=false 658size=32768 659system=system 660tags=system.cpu0.icache.tags 661tgts_per_mshr=8 662two_queue=false 663write_buffers=8 664cpu_side=system.cpu0.icache_port 665mem_side=system.cpu0.toL2Bus.slave[0] 666 667[system.cpu0.icache.tags] 668type=LRU 669assoc=2 670block_size=64 671clk_domain=system.cpu_clk_domain 672eventq_index=0 673hit_latency=1 674sequential_access=false 675size=32768 676 677[system.cpu0.interrupts] 678type=ArmInterrupts 679eventq_index=0 680 681[system.cpu0.isa] 682type=ArmISA 683eventq_index=0 684fpsid=1090793632 685id_aa64afr0_el1=0 686id_aa64afr1_el1=0 687id_aa64dfr0_el1=1052678 688id_aa64dfr1_el1=0 689id_aa64isar0_el1=0 690id_aa64isar1_el1=0 691id_aa64mmfr0_el1=15728642 692id_aa64mmfr1_el1=0 693id_aa64pfr0_el1=17 694id_aa64pfr1_el1=0 695id_isar0=34607377 696id_isar1=34677009 697id_isar2=555950401 698id_isar3=17899825 699id_isar4=268501314 700id_isar5=0 701id_mmfr0=270536963 702id_mmfr1=0 703id_mmfr2=19070976 704id_mmfr3=34611729 705id_pfr0=49 706id_pfr1=4113 707midr=1091551472
| 90read_only=true 91 92[system.clk_domain] 93type=SrcClockDomain 94clock=1000 95domain_id=-1 96eventq_index=0 97init_perf_level=0 98voltage_domain=system.voltage_domain 99 100[system.cpu0] 101type=MinorCPU 102children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 103branchPred=system.cpu0.branchPred 104checker=Null 105clk_domain=system.cpu_clk_domain 106cpu_id=0 107decodeCycleInput=true 108decodeInputBufferSize=3 109decodeInputWidth=2 110decodeToExecuteForwardDelay=1 111do_checkpoint_insts=true 112do_quiesce=true 113do_statistics_insts=true 114dstage2_mmu=system.cpu0.dstage2_mmu 115dtb=system.cpu0.dtb 116enableIdling=true 117eventq_index=0 118executeAllowEarlyMemoryIssue=true 119executeBranchDelay=1 120executeCommitLimit=2 121executeCycleInput=true 122executeFuncUnits=system.cpu0.executeFuncUnits 123executeInputBufferSize=7 124executeInputWidth=2 125executeIssueLimit=2 126executeLSQMaxStoreBufferStoresPerCycle=2 127executeLSQRequestsQueueSize=1 128executeLSQStoreBufferSize=5 129executeLSQTransfersQueueSize=2 130executeMaxAccessesInMemory=2 131executeMemoryCommitLimit=1 132executeMemoryIssueLimit=1 133executeMemoryWidth=0 134executeSetTraceTimeOnCommit=true 135executeSetTraceTimeOnIssue=false 136fetch1FetchLimit=1 137fetch1LineSnapWidth=0 138fetch1LineWidth=0 139fetch1ToFetch2BackwardDelay=1 140fetch1ToFetch2ForwardDelay=1 141fetch2CycleInput=true 142fetch2InputBufferSize=2 143fetch2ToDecodeForwardDelay=1 144function_trace=false 145function_trace_start=0 146interrupts=system.cpu0.interrupts 147isa=system.cpu0.isa 148istage2_mmu=system.cpu0.istage2_mmu 149itb=system.cpu0.itb 150max_insts_all_threads=0 151max_insts_any_thread=0 152max_loads_all_threads=0 153max_loads_any_thread=0 154numThreads=1 155profile=0 156progress_interval=0 157simpoint_start_insts= 158socket_id=0 159switched_out=false 160system=system 161tracer=system.cpu0.tracer 162workload= 163dcache_port=system.cpu0.dcache.cpu_side 164icache_port=system.cpu0.icache.cpu_side 165 166[system.cpu0.branchPred] 167type=BranchPredictor 168BTBEntries=4096 169BTBTagSize=16 170RASSize=16 171choiceCtrBits=2 172choicePredictorSize=8192 173eventq_index=0 174globalCtrBits=2 175globalPredictorSize=8192 176instShiftAmt=2 177localCtrBits=2 178localHistoryTableSize=2048 179localPredictorSize=2048 180numThreads=1 181predType=tournament 182 183[system.cpu0.dcache] 184type=BaseCache 185children=tags 186addr_ranges=0:18446744073709551615 187assoc=2 188clk_domain=system.cpu_clk_domain 189eventq_index=0 190forward_snoops=true 191hit_latency=2 192is_top_level=true 193max_miss_count=0 194mshrs=6 195prefetch_on_access=false 196prefetcher=Null 197response_latency=2 198sequential_access=false 199size=32768 200system=system 201tags=system.cpu0.dcache.tags 202tgts_per_mshr=8 203two_queue=false 204write_buffers=16 205cpu_side=system.cpu0.dcache_port 206mem_side=system.cpu0.toL2Bus.slave[1] 207 208[system.cpu0.dcache.tags] 209type=LRU 210assoc=2 211block_size=64 212clk_domain=system.cpu_clk_domain 213eventq_index=0 214hit_latency=2 215sequential_access=false 216size=32768 217 218[system.cpu0.dstage2_mmu] 219type=ArmStage2MMU 220children=stage2_tlb 221eventq_index=0 222stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 223tlb=system.cpu0.dtb 224 225[system.cpu0.dstage2_mmu.stage2_tlb] 226type=ArmTLB 227children=walker 228eventq_index=0 229is_stage2=true 230size=32 231walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 232 233[system.cpu0.dstage2_mmu.stage2_tlb.walker] 234type=ArmTableWalker 235clk_domain=system.cpu_clk_domain 236eventq_index=0 237is_stage2=true 238num_squash_per_cycle=2 239sys=system 240port=system.cpu0.toL2Bus.slave[5] 241 242[system.cpu0.dtb] 243type=ArmTLB 244children=walker 245eventq_index=0 246is_stage2=false 247size=64 248walker=system.cpu0.dtb.walker 249 250[system.cpu0.dtb.walker] 251type=ArmTableWalker 252clk_domain=system.cpu_clk_domain 253eventq_index=0 254is_stage2=false 255num_squash_per_cycle=2 256sys=system 257port=system.cpu0.toL2Bus.slave[3] 258 259[system.cpu0.executeFuncUnits] 260type=MinorFUPool 261children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 262eventq_index=0 263funcUnits=system.cpu0.executeFuncUnits.funcUnits0 system.cpu0.executeFuncUnits.funcUnits1 system.cpu0.executeFuncUnits.funcUnits2 system.cpu0.executeFuncUnits.funcUnits3 system.cpu0.executeFuncUnits.funcUnits4 system.cpu0.executeFuncUnits.funcUnits5 system.cpu0.executeFuncUnits.funcUnits6 264 265[system.cpu0.executeFuncUnits.funcUnits0] 266type=MinorFU 267children=opClasses timings 268cantForwardFromFUIndices= 269eventq_index=0 270issueLat=1 271opClasses=system.cpu0.executeFuncUnits.funcUnits0.opClasses 272opLat=3 273timings=system.cpu0.executeFuncUnits.funcUnits0.timings 274 275[system.cpu0.executeFuncUnits.funcUnits0.opClasses] 276type=MinorOpClassSet 277children=opClasses 278eventq_index=0 279opClasses=system.cpu0.executeFuncUnits.funcUnits0.opClasses.opClasses 280 281[system.cpu0.executeFuncUnits.funcUnits0.opClasses.opClasses] 282type=MinorOpClass 283eventq_index=0 284opClass=IntAlu 285 286[system.cpu0.executeFuncUnits.funcUnits0.timings] 287type=MinorFUTiming 288children=opClasses 289description=Int 290eventq_index=0 291extraAssumedLat=0 292extraCommitLat=0 293extraCommitLatExpr=Null 294mask=0 295match=0 296opClasses=system.cpu0.executeFuncUnits.funcUnits0.timings.opClasses 297srcRegsRelativeLats=2 298suppress=false 299 300[system.cpu0.executeFuncUnits.funcUnits0.timings.opClasses] 301type=MinorOpClassSet 302eventq_index=0 303opClasses= 304 305[system.cpu0.executeFuncUnits.funcUnits1] 306type=MinorFU 307children=opClasses timings 308cantForwardFromFUIndices= 309eventq_index=0 310issueLat=1 311opClasses=system.cpu0.executeFuncUnits.funcUnits1.opClasses 312opLat=3 313timings=system.cpu0.executeFuncUnits.funcUnits1.timings 314 315[system.cpu0.executeFuncUnits.funcUnits1.opClasses] 316type=MinorOpClassSet 317children=opClasses 318eventq_index=0 319opClasses=system.cpu0.executeFuncUnits.funcUnits1.opClasses.opClasses 320 321[system.cpu0.executeFuncUnits.funcUnits1.opClasses.opClasses] 322type=MinorOpClass 323eventq_index=0 324opClass=IntAlu 325 326[system.cpu0.executeFuncUnits.funcUnits1.timings] 327type=MinorFUTiming 328children=opClasses 329description=Int 330eventq_index=0 331extraAssumedLat=0 332extraCommitLat=0 333extraCommitLatExpr=Null 334mask=0 335match=0 336opClasses=system.cpu0.executeFuncUnits.funcUnits1.timings.opClasses 337srcRegsRelativeLats=2 338suppress=false 339 340[system.cpu0.executeFuncUnits.funcUnits1.timings.opClasses] 341type=MinorOpClassSet 342eventq_index=0 343opClasses= 344 345[system.cpu0.executeFuncUnits.funcUnits2] 346type=MinorFU 347children=opClasses timings 348cantForwardFromFUIndices= 349eventq_index=0 350issueLat=1 351opClasses=system.cpu0.executeFuncUnits.funcUnits2.opClasses 352opLat=3 353timings=system.cpu0.executeFuncUnits.funcUnits2.timings 354 355[system.cpu0.executeFuncUnits.funcUnits2.opClasses] 356type=MinorOpClassSet 357children=opClasses 358eventq_index=0 359opClasses=system.cpu0.executeFuncUnits.funcUnits2.opClasses.opClasses 360 361[system.cpu0.executeFuncUnits.funcUnits2.opClasses.opClasses] 362type=MinorOpClass 363eventq_index=0 364opClass=IntMult 365 366[system.cpu0.executeFuncUnits.funcUnits2.timings] 367type=MinorFUTiming 368children=opClasses 369description=Mul 370eventq_index=0 371extraAssumedLat=0 372extraCommitLat=0 373extraCommitLatExpr=Null 374mask=0 375match=0 376opClasses=system.cpu0.executeFuncUnits.funcUnits2.timings.opClasses 377srcRegsRelativeLats=0 378suppress=false 379 380[system.cpu0.executeFuncUnits.funcUnits2.timings.opClasses] 381type=MinorOpClassSet 382eventq_index=0 383opClasses= 384 385[system.cpu0.executeFuncUnits.funcUnits3] 386type=MinorFU 387children=opClasses 388cantForwardFromFUIndices= 389eventq_index=0 390issueLat=9 391opClasses=system.cpu0.executeFuncUnits.funcUnits3.opClasses 392opLat=9 393timings= 394 395[system.cpu0.executeFuncUnits.funcUnits3.opClasses] 396type=MinorOpClassSet 397children=opClasses 398eventq_index=0 399opClasses=system.cpu0.executeFuncUnits.funcUnits3.opClasses.opClasses 400 401[system.cpu0.executeFuncUnits.funcUnits3.opClasses.opClasses] 402type=MinorOpClass 403eventq_index=0 404opClass=IntDiv 405 406[system.cpu0.executeFuncUnits.funcUnits4] 407type=MinorFU 408children=opClasses timings 409cantForwardFromFUIndices= 410eventq_index=0 411issueLat=1 412opClasses=system.cpu0.executeFuncUnits.funcUnits4.opClasses 413opLat=6 414timings=system.cpu0.executeFuncUnits.funcUnits4.timings 415 416[system.cpu0.executeFuncUnits.funcUnits4.opClasses] 417type=MinorOpClassSet 418children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 419eventq_index=0 420opClasses=system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses25 421 422[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses00] 423type=MinorOpClass 424eventq_index=0 425opClass=FloatAdd 426 427[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses01] 428type=MinorOpClass 429eventq_index=0 430opClass=FloatCmp 431 432[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses02] 433type=MinorOpClass 434eventq_index=0 435opClass=FloatCvt 436 437[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses03] 438type=MinorOpClass 439eventq_index=0 440opClass=FloatMult 441 442[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses04] 443type=MinorOpClass 444eventq_index=0 445opClass=FloatDiv 446 447[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses05] 448type=MinorOpClass 449eventq_index=0 450opClass=FloatSqrt 451 452[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses06] 453type=MinorOpClass 454eventq_index=0 455opClass=SimdAdd 456 457[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses07] 458type=MinorOpClass 459eventq_index=0 460opClass=SimdAddAcc 461 462[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses08] 463type=MinorOpClass 464eventq_index=0 465opClass=SimdAlu 466 467[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses09] 468type=MinorOpClass 469eventq_index=0 470opClass=SimdCmp 471 472[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses10] 473type=MinorOpClass 474eventq_index=0 475opClass=SimdCvt 476 477[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses11] 478type=MinorOpClass 479eventq_index=0 480opClass=SimdMisc 481 482[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses12] 483type=MinorOpClass 484eventq_index=0 485opClass=SimdMult 486 487[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses13] 488type=MinorOpClass 489eventq_index=0 490opClass=SimdMultAcc 491 492[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses14] 493type=MinorOpClass 494eventq_index=0 495opClass=SimdShift 496 497[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses15] 498type=MinorOpClass 499eventq_index=0 500opClass=SimdShiftAcc 501 502[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses16] 503type=MinorOpClass 504eventq_index=0 505opClass=SimdSqrt 506 507[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses17] 508type=MinorOpClass 509eventq_index=0 510opClass=SimdFloatAdd 511 512[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses18] 513type=MinorOpClass 514eventq_index=0 515opClass=SimdFloatAlu 516 517[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses19] 518type=MinorOpClass 519eventq_index=0 520opClass=SimdFloatCmp 521 522[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses20] 523type=MinorOpClass 524eventq_index=0 525opClass=SimdFloatCvt 526 527[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses21] 528type=MinorOpClass 529eventq_index=0 530opClass=SimdFloatDiv 531 532[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses22] 533type=MinorOpClass 534eventq_index=0 535opClass=SimdFloatMisc 536 537[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses23] 538type=MinorOpClass 539eventq_index=0 540opClass=SimdFloatMult 541 542[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses24] 543type=MinorOpClass 544eventq_index=0 545opClass=SimdFloatMultAcc 546 547[system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses25] 548type=MinorOpClass 549eventq_index=0 550opClass=SimdFloatSqrt 551 552[system.cpu0.executeFuncUnits.funcUnits4.timings] 553type=MinorFUTiming 554children=opClasses 555description=FloatSimd 556eventq_index=0 557extraAssumedLat=0 558extraCommitLat=0 559extraCommitLatExpr=Null 560mask=0 561match=0 562opClasses=system.cpu0.executeFuncUnits.funcUnits4.timings.opClasses 563srcRegsRelativeLats=2 564suppress=false 565 566[system.cpu0.executeFuncUnits.funcUnits4.timings.opClasses] 567type=MinorOpClassSet 568eventq_index=0 569opClasses= 570 571[system.cpu0.executeFuncUnits.funcUnits5] 572type=MinorFU 573children=opClasses timings 574cantForwardFromFUIndices= 575eventq_index=0 576issueLat=1 577opClasses=system.cpu0.executeFuncUnits.funcUnits5.opClasses 578opLat=1 579timings=system.cpu0.executeFuncUnits.funcUnits5.timings 580 581[system.cpu0.executeFuncUnits.funcUnits5.opClasses] 582type=MinorOpClassSet 583children=opClasses0 opClasses1 584eventq_index=0 585opClasses=system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses1 586 587[system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses0] 588type=MinorOpClass 589eventq_index=0 590opClass=MemRead 591 592[system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses1] 593type=MinorOpClass 594eventq_index=0 595opClass=MemWrite 596 597[system.cpu0.executeFuncUnits.funcUnits5.timings] 598type=MinorFUTiming 599children=opClasses 600description=Mem 601eventq_index=0 602extraAssumedLat=2 603extraCommitLat=0 604extraCommitLatExpr=Null 605mask=0 606match=0 607opClasses=system.cpu0.executeFuncUnits.funcUnits5.timings.opClasses 608srcRegsRelativeLats=1 609suppress=false 610 611[system.cpu0.executeFuncUnits.funcUnits5.timings.opClasses] 612type=MinorOpClassSet 613eventq_index=0 614opClasses= 615 616[system.cpu0.executeFuncUnits.funcUnits6] 617type=MinorFU 618children=opClasses 619cantForwardFromFUIndices= 620eventq_index=0 621issueLat=1 622opClasses=system.cpu0.executeFuncUnits.funcUnits6.opClasses 623opLat=1 624timings= 625 626[system.cpu0.executeFuncUnits.funcUnits6.opClasses] 627type=MinorOpClassSet 628children=opClasses0 opClasses1 629eventq_index=0 630opClasses=system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses1 631 632[system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses0] 633type=MinorOpClass 634eventq_index=0 635opClass=IprAccess 636 637[system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses1] 638type=MinorOpClass 639eventq_index=0 640opClass=InstPrefetch 641 642[system.cpu0.icache] 643type=BaseCache 644children=tags 645addr_ranges=0:18446744073709551615 646assoc=2 647clk_domain=system.cpu_clk_domain 648eventq_index=0 649forward_snoops=true 650hit_latency=1 651is_top_level=true 652max_miss_count=0 653mshrs=2 654prefetch_on_access=false 655prefetcher=Null 656response_latency=1 657sequential_access=false 658size=32768 659system=system 660tags=system.cpu0.icache.tags 661tgts_per_mshr=8 662two_queue=false 663write_buffers=8 664cpu_side=system.cpu0.icache_port 665mem_side=system.cpu0.toL2Bus.slave[0] 666 667[system.cpu0.icache.tags] 668type=LRU 669assoc=2 670block_size=64 671clk_domain=system.cpu_clk_domain 672eventq_index=0 673hit_latency=1 674sequential_access=false 675size=32768 676 677[system.cpu0.interrupts] 678type=ArmInterrupts 679eventq_index=0 680 681[system.cpu0.isa] 682type=ArmISA 683eventq_index=0 684fpsid=1090793632 685id_aa64afr0_el1=0 686id_aa64afr1_el1=0 687id_aa64dfr0_el1=1052678 688id_aa64dfr1_el1=0 689id_aa64isar0_el1=0 690id_aa64isar1_el1=0 691id_aa64mmfr0_el1=15728642 692id_aa64mmfr1_el1=0 693id_aa64pfr0_el1=17 694id_aa64pfr1_el1=0 695id_isar0=34607377 696id_isar1=34677009 697id_isar2=555950401 698id_isar3=17899825 699id_isar4=268501314 700id_isar5=0 701id_mmfr0=270536963 702id_mmfr1=0 703id_mmfr2=19070976 704id_mmfr3=34611729 705id_pfr0=49 706id_pfr1=4113 707midr=1091551472
|
| 708pmu=Null
|
708system=system 709 710[system.cpu0.istage2_mmu] 711type=ArmStage2MMU 712children=stage2_tlb 713eventq_index=0 714stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 715tlb=system.cpu0.itb 716 717[system.cpu0.istage2_mmu.stage2_tlb] 718type=ArmTLB 719children=walker 720eventq_index=0 721is_stage2=true 722size=32 723walker=system.cpu0.istage2_mmu.stage2_tlb.walker 724 725[system.cpu0.istage2_mmu.stage2_tlb.walker] 726type=ArmTableWalker 727clk_domain=system.cpu_clk_domain 728eventq_index=0 729is_stage2=true 730num_squash_per_cycle=2 731sys=system 732port=system.cpu0.toL2Bus.slave[4] 733 734[system.cpu0.itb] 735type=ArmTLB 736children=walker 737eventq_index=0 738is_stage2=false 739size=64 740walker=system.cpu0.itb.walker 741 742[system.cpu0.itb.walker] 743type=ArmTableWalker 744clk_domain=system.cpu_clk_domain 745eventq_index=0 746is_stage2=false 747num_squash_per_cycle=2 748sys=system 749port=system.cpu0.toL2Bus.slave[2] 750 751[system.cpu0.l2cache] 752type=BaseCache 753children=prefetcher tags 754addr_ranges=0:18446744073709551615 755assoc=16 756clk_domain=system.cpu_clk_domain 757eventq_index=0 758forward_snoops=true 759hit_latency=12 760is_top_level=false 761max_miss_count=0 762mshrs=16 763prefetch_on_access=true 764prefetcher=system.cpu0.l2cache.prefetcher 765response_latency=12 766sequential_access=false 767size=1048576 768system=system 769tags=system.cpu0.l2cache.tags 770tgts_per_mshr=8 771two_queue=false 772write_buffers=8 773cpu_side=system.cpu0.toL2Bus.master[0] 774mem_side=system.toL2Bus.slave[0] 775 776[system.cpu0.l2cache.prefetcher] 777type=StridePrefetcher 778clk_domain=system.cpu_clk_domain 779cross_pages=false 780data_accesses_only=false 781degree=8 782eventq_index=0 783inst_tagged=true 784latency=1 785on_miss_only=false 786on_prefetch=true 787on_read_only=false 788serial_squash=false 789size=100 790sys=system 791use_master_id=true 792 793[system.cpu0.l2cache.tags] 794type=RandomRepl 795assoc=16 796block_size=64 797clk_domain=system.cpu_clk_domain 798eventq_index=0 799hit_latency=12 800sequential_access=false 801size=1048576 802 803[system.cpu0.toL2Bus] 804type=CoherentXBar 805clk_domain=system.cpu_clk_domain 806eventq_index=0 807header_cycles=1 808snoop_filter=Null 809system=system 810use_default_range=false 811width=32 812master=system.cpu0.l2cache.cpu_side 813slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port 814 815[system.cpu0.tracer] 816type=ExeTracer 817eventq_index=0 818 819[system.cpu1] 820type=MinorCPU 821children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 822branchPred=system.cpu1.branchPred 823checker=Null 824clk_domain=system.cpu_clk_domain 825cpu_id=1 826decodeCycleInput=true 827decodeInputBufferSize=3 828decodeInputWidth=2 829decodeToExecuteForwardDelay=1 830do_checkpoint_insts=true 831do_quiesce=true 832do_statistics_insts=true 833dstage2_mmu=system.cpu1.dstage2_mmu 834dtb=system.cpu1.dtb 835enableIdling=true 836eventq_index=0 837executeAllowEarlyMemoryIssue=true 838executeBranchDelay=1 839executeCommitLimit=2 840executeCycleInput=true 841executeFuncUnits=system.cpu1.executeFuncUnits 842executeInputBufferSize=7 843executeInputWidth=2 844executeIssueLimit=2 845executeLSQMaxStoreBufferStoresPerCycle=2 846executeLSQRequestsQueueSize=1 847executeLSQStoreBufferSize=5 848executeLSQTransfersQueueSize=2 849executeMaxAccessesInMemory=2 850executeMemoryCommitLimit=1 851executeMemoryIssueLimit=1 852executeMemoryWidth=0 853executeSetTraceTimeOnCommit=true 854executeSetTraceTimeOnIssue=false 855fetch1FetchLimit=1 856fetch1LineSnapWidth=0 857fetch1LineWidth=0 858fetch1ToFetch2BackwardDelay=1 859fetch1ToFetch2ForwardDelay=1 860fetch2CycleInput=true 861fetch2InputBufferSize=2 862fetch2ToDecodeForwardDelay=1 863function_trace=false 864function_trace_start=0 865interrupts=system.cpu1.interrupts 866isa=system.cpu1.isa 867istage2_mmu=system.cpu1.istage2_mmu 868itb=system.cpu1.itb 869max_insts_all_threads=0 870max_insts_any_thread=0 871max_loads_all_threads=0 872max_loads_any_thread=0 873numThreads=1 874profile=0 875progress_interval=0 876simpoint_start_insts= 877socket_id=0 878switched_out=false 879system=system 880tracer=system.cpu1.tracer 881workload= 882dcache_port=system.cpu1.dcache.cpu_side 883icache_port=system.cpu1.icache.cpu_side 884 885[system.cpu1.branchPred] 886type=BranchPredictor 887BTBEntries=4096 888BTBTagSize=16 889RASSize=16 890choiceCtrBits=2 891choicePredictorSize=8192 892eventq_index=0 893globalCtrBits=2 894globalPredictorSize=8192 895instShiftAmt=2 896localCtrBits=2 897localHistoryTableSize=2048 898localPredictorSize=2048 899numThreads=1 900predType=tournament 901 902[system.cpu1.dcache] 903type=BaseCache 904children=tags 905addr_ranges=0:18446744073709551615 906assoc=2 907clk_domain=system.cpu_clk_domain 908eventq_index=0 909forward_snoops=true 910hit_latency=2 911is_top_level=true 912max_miss_count=0 913mshrs=6 914prefetch_on_access=false 915prefetcher=Null 916response_latency=2 917sequential_access=false 918size=32768 919system=system 920tags=system.cpu1.dcache.tags 921tgts_per_mshr=8 922two_queue=false 923write_buffers=16 924cpu_side=system.cpu1.dcache_port 925mem_side=system.cpu1.toL2Bus.slave[1] 926 927[system.cpu1.dcache.tags] 928type=LRU 929assoc=2 930block_size=64 931clk_domain=system.cpu_clk_domain 932eventq_index=0 933hit_latency=2 934sequential_access=false 935size=32768 936 937[system.cpu1.dstage2_mmu] 938type=ArmStage2MMU 939children=stage2_tlb 940eventq_index=0 941stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 942tlb=system.cpu1.dtb 943 944[system.cpu1.dstage2_mmu.stage2_tlb] 945type=ArmTLB 946children=walker 947eventq_index=0 948is_stage2=true 949size=32 950walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 951 952[system.cpu1.dstage2_mmu.stage2_tlb.walker] 953type=ArmTableWalker 954clk_domain=system.cpu_clk_domain 955eventq_index=0 956is_stage2=true 957num_squash_per_cycle=2 958sys=system 959port=system.cpu1.toL2Bus.slave[5] 960 961[system.cpu1.dtb] 962type=ArmTLB 963children=walker 964eventq_index=0 965is_stage2=false 966size=64 967walker=system.cpu1.dtb.walker 968 969[system.cpu1.dtb.walker] 970type=ArmTableWalker 971clk_domain=system.cpu_clk_domain 972eventq_index=0 973is_stage2=false 974num_squash_per_cycle=2 975sys=system 976port=system.cpu1.toL2Bus.slave[3] 977 978[system.cpu1.executeFuncUnits] 979type=MinorFUPool 980children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 981eventq_index=0 982funcUnits=system.cpu1.executeFuncUnits.funcUnits0 system.cpu1.executeFuncUnits.funcUnits1 system.cpu1.executeFuncUnits.funcUnits2 system.cpu1.executeFuncUnits.funcUnits3 system.cpu1.executeFuncUnits.funcUnits4 system.cpu1.executeFuncUnits.funcUnits5 system.cpu1.executeFuncUnits.funcUnits6 983 984[system.cpu1.executeFuncUnits.funcUnits0] 985type=MinorFU 986children=opClasses timings 987cantForwardFromFUIndices= 988eventq_index=0 989issueLat=1 990opClasses=system.cpu1.executeFuncUnits.funcUnits0.opClasses 991opLat=3 992timings=system.cpu1.executeFuncUnits.funcUnits0.timings 993 994[system.cpu1.executeFuncUnits.funcUnits0.opClasses] 995type=MinorOpClassSet 996children=opClasses 997eventq_index=0 998opClasses=system.cpu1.executeFuncUnits.funcUnits0.opClasses.opClasses 999 1000[system.cpu1.executeFuncUnits.funcUnits0.opClasses.opClasses] 1001type=MinorOpClass 1002eventq_index=0 1003opClass=IntAlu 1004 1005[system.cpu1.executeFuncUnits.funcUnits0.timings] 1006type=MinorFUTiming 1007children=opClasses 1008description=Int 1009eventq_index=0 1010extraAssumedLat=0 1011extraCommitLat=0 1012extraCommitLatExpr=Null 1013mask=0 1014match=0 1015opClasses=system.cpu1.executeFuncUnits.funcUnits0.timings.opClasses 1016srcRegsRelativeLats=2 1017suppress=false 1018 1019[system.cpu1.executeFuncUnits.funcUnits0.timings.opClasses] 1020type=MinorOpClassSet 1021eventq_index=0 1022opClasses= 1023 1024[system.cpu1.executeFuncUnits.funcUnits1] 1025type=MinorFU 1026children=opClasses timings 1027cantForwardFromFUIndices= 1028eventq_index=0 1029issueLat=1 1030opClasses=system.cpu1.executeFuncUnits.funcUnits1.opClasses 1031opLat=3 1032timings=system.cpu1.executeFuncUnits.funcUnits1.timings 1033 1034[system.cpu1.executeFuncUnits.funcUnits1.opClasses] 1035type=MinorOpClassSet 1036children=opClasses 1037eventq_index=0 1038opClasses=system.cpu1.executeFuncUnits.funcUnits1.opClasses.opClasses 1039 1040[system.cpu1.executeFuncUnits.funcUnits1.opClasses.opClasses] 1041type=MinorOpClass 1042eventq_index=0 1043opClass=IntAlu 1044 1045[system.cpu1.executeFuncUnits.funcUnits1.timings] 1046type=MinorFUTiming 1047children=opClasses 1048description=Int 1049eventq_index=0 1050extraAssumedLat=0 1051extraCommitLat=0 1052extraCommitLatExpr=Null 1053mask=0 1054match=0 1055opClasses=system.cpu1.executeFuncUnits.funcUnits1.timings.opClasses 1056srcRegsRelativeLats=2 1057suppress=false 1058 1059[system.cpu1.executeFuncUnits.funcUnits1.timings.opClasses] 1060type=MinorOpClassSet 1061eventq_index=0 1062opClasses= 1063 1064[system.cpu1.executeFuncUnits.funcUnits2] 1065type=MinorFU 1066children=opClasses timings 1067cantForwardFromFUIndices= 1068eventq_index=0 1069issueLat=1 1070opClasses=system.cpu1.executeFuncUnits.funcUnits2.opClasses 1071opLat=3 1072timings=system.cpu1.executeFuncUnits.funcUnits2.timings 1073 1074[system.cpu1.executeFuncUnits.funcUnits2.opClasses] 1075type=MinorOpClassSet 1076children=opClasses 1077eventq_index=0 1078opClasses=system.cpu1.executeFuncUnits.funcUnits2.opClasses.opClasses 1079 1080[system.cpu1.executeFuncUnits.funcUnits2.opClasses.opClasses] 1081type=MinorOpClass 1082eventq_index=0 1083opClass=IntMult 1084 1085[system.cpu1.executeFuncUnits.funcUnits2.timings] 1086type=MinorFUTiming 1087children=opClasses 1088description=Mul 1089eventq_index=0 1090extraAssumedLat=0 1091extraCommitLat=0 1092extraCommitLatExpr=Null 1093mask=0 1094match=0 1095opClasses=system.cpu1.executeFuncUnits.funcUnits2.timings.opClasses 1096srcRegsRelativeLats=0 1097suppress=false 1098 1099[system.cpu1.executeFuncUnits.funcUnits2.timings.opClasses] 1100type=MinorOpClassSet 1101eventq_index=0 1102opClasses= 1103 1104[system.cpu1.executeFuncUnits.funcUnits3] 1105type=MinorFU 1106children=opClasses 1107cantForwardFromFUIndices= 1108eventq_index=0 1109issueLat=9 1110opClasses=system.cpu1.executeFuncUnits.funcUnits3.opClasses 1111opLat=9 1112timings= 1113 1114[system.cpu1.executeFuncUnits.funcUnits3.opClasses] 1115type=MinorOpClassSet 1116children=opClasses 1117eventq_index=0 1118opClasses=system.cpu1.executeFuncUnits.funcUnits3.opClasses.opClasses 1119 1120[system.cpu1.executeFuncUnits.funcUnits3.opClasses.opClasses] 1121type=MinorOpClass 1122eventq_index=0 1123opClass=IntDiv 1124 1125[system.cpu1.executeFuncUnits.funcUnits4] 1126type=MinorFU 1127children=opClasses timings 1128cantForwardFromFUIndices= 1129eventq_index=0 1130issueLat=1 1131opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses 1132opLat=6 1133timings=system.cpu1.executeFuncUnits.funcUnits4.timings 1134 1135[system.cpu1.executeFuncUnits.funcUnits4.opClasses] 1136type=MinorOpClassSet 1137children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 1138eventq_index=0 1139opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25 1140 1141[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00] 1142type=MinorOpClass 1143eventq_index=0 1144opClass=FloatAdd 1145 1146[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01] 1147type=MinorOpClass 1148eventq_index=0 1149opClass=FloatCmp 1150 1151[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02] 1152type=MinorOpClass 1153eventq_index=0 1154opClass=FloatCvt 1155 1156[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03] 1157type=MinorOpClass 1158eventq_index=0 1159opClass=FloatMult 1160 1161[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04] 1162type=MinorOpClass 1163eventq_index=0 1164opClass=FloatDiv 1165 1166[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05] 1167type=MinorOpClass 1168eventq_index=0 1169opClass=FloatSqrt 1170 1171[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06] 1172type=MinorOpClass 1173eventq_index=0 1174opClass=SimdAdd 1175 1176[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07] 1177type=MinorOpClass 1178eventq_index=0 1179opClass=SimdAddAcc 1180 1181[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08] 1182type=MinorOpClass 1183eventq_index=0 1184opClass=SimdAlu 1185 1186[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09] 1187type=MinorOpClass 1188eventq_index=0 1189opClass=SimdCmp 1190 1191[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10] 1192type=MinorOpClass 1193eventq_index=0 1194opClass=SimdCvt 1195 1196[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11] 1197type=MinorOpClass 1198eventq_index=0 1199opClass=SimdMisc 1200 1201[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12] 1202type=MinorOpClass 1203eventq_index=0 1204opClass=SimdMult 1205 1206[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13] 1207type=MinorOpClass 1208eventq_index=0 1209opClass=SimdMultAcc 1210 1211[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14] 1212type=MinorOpClass 1213eventq_index=0 1214opClass=SimdShift 1215 1216[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15] 1217type=MinorOpClass 1218eventq_index=0 1219opClass=SimdShiftAcc 1220 1221[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16] 1222type=MinorOpClass 1223eventq_index=0 1224opClass=SimdSqrt 1225 1226[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17] 1227type=MinorOpClass 1228eventq_index=0 1229opClass=SimdFloatAdd 1230 1231[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18] 1232type=MinorOpClass 1233eventq_index=0 1234opClass=SimdFloatAlu 1235 1236[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19] 1237type=MinorOpClass 1238eventq_index=0 1239opClass=SimdFloatCmp 1240 1241[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20] 1242type=MinorOpClass 1243eventq_index=0 1244opClass=SimdFloatCvt 1245 1246[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21] 1247type=MinorOpClass 1248eventq_index=0 1249opClass=SimdFloatDiv 1250 1251[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22] 1252type=MinorOpClass 1253eventq_index=0 1254opClass=SimdFloatMisc 1255 1256[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23] 1257type=MinorOpClass 1258eventq_index=0 1259opClass=SimdFloatMult 1260 1261[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24] 1262type=MinorOpClass 1263eventq_index=0 1264opClass=SimdFloatMultAcc 1265 1266[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25] 1267type=MinorOpClass 1268eventq_index=0 1269opClass=SimdFloatSqrt 1270 1271[system.cpu1.executeFuncUnits.funcUnits4.timings] 1272type=MinorFUTiming 1273children=opClasses 1274description=FloatSimd 1275eventq_index=0 1276extraAssumedLat=0 1277extraCommitLat=0 1278extraCommitLatExpr=Null 1279mask=0 1280match=0 1281opClasses=system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses 1282srcRegsRelativeLats=2 1283suppress=false 1284 1285[system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses] 1286type=MinorOpClassSet 1287eventq_index=0 1288opClasses= 1289 1290[system.cpu1.executeFuncUnits.funcUnits5] 1291type=MinorFU 1292children=opClasses timings 1293cantForwardFromFUIndices= 1294eventq_index=0 1295issueLat=1 1296opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses 1297opLat=1 1298timings=system.cpu1.executeFuncUnits.funcUnits5.timings 1299 1300[system.cpu1.executeFuncUnits.funcUnits5.opClasses] 1301type=MinorOpClassSet 1302children=opClasses0 opClasses1 1303eventq_index=0 1304opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1 1305 1306[system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0] 1307type=MinorOpClass 1308eventq_index=0 1309opClass=MemRead 1310 1311[system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1] 1312type=MinorOpClass 1313eventq_index=0 1314opClass=MemWrite 1315 1316[system.cpu1.executeFuncUnits.funcUnits5.timings] 1317type=MinorFUTiming 1318children=opClasses 1319description=Mem 1320eventq_index=0 1321extraAssumedLat=2 1322extraCommitLat=0 1323extraCommitLatExpr=Null 1324mask=0 1325match=0 1326opClasses=system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses 1327srcRegsRelativeLats=1 1328suppress=false 1329 1330[system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses] 1331type=MinorOpClassSet 1332eventq_index=0 1333opClasses= 1334 1335[system.cpu1.executeFuncUnits.funcUnits6] 1336type=MinorFU 1337children=opClasses 1338cantForwardFromFUIndices= 1339eventq_index=0 1340issueLat=1 1341opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses 1342opLat=1 1343timings= 1344 1345[system.cpu1.executeFuncUnits.funcUnits6.opClasses] 1346type=MinorOpClassSet 1347children=opClasses0 opClasses1 1348eventq_index=0 1349opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1 1350 1351[system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0] 1352type=MinorOpClass 1353eventq_index=0 1354opClass=IprAccess 1355 1356[system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1] 1357type=MinorOpClass 1358eventq_index=0 1359opClass=InstPrefetch 1360 1361[system.cpu1.icache] 1362type=BaseCache 1363children=tags 1364addr_ranges=0:18446744073709551615 1365assoc=2 1366clk_domain=system.cpu_clk_domain 1367eventq_index=0 1368forward_snoops=true 1369hit_latency=1 1370is_top_level=true 1371max_miss_count=0 1372mshrs=2 1373prefetch_on_access=false 1374prefetcher=Null 1375response_latency=1 1376sequential_access=false 1377size=32768 1378system=system 1379tags=system.cpu1.icache.tags 1380tgts_per_mshr=8 1381two_queue=false 1382write_buffers=8 1383cpu_side=system.cpu1.icache_port 1384mem_side=system.cpu1.toL2Bus.slave[0] 1385 1386[system.cpu1.icache.tags] 1387type=LRU 1388assoc=2 1389block_size=64 1390clk_domain=system.cpu_clk_domain 1391eventq_index=0 1392hit_latency=1 1393sequential_access=false 1394size=32768 1395 1396[system.cpu1.interrupts] 1397type=ArmInterrupts 1398eventq_index=0 1399 1400[system.cpu1.isa] 1401type=ArmISA 1402eventq_index=0 1403fpsid=1090793632 1404id_aa64afr0_el1=0 1405id_aa64afr1_el1=0 1406id_aa64dfr0_el1=1052678 1407id_aa64dfr1_el1=0 1408id_aa64isar0_el1=0 1409id_aa64isar1_el1=0 1410id_aa64mmfr0_el1=15728642 1411id_aa64mmfr1_el1=0 1412id_aa64pfr0_el1=17 1413id_aa64pfr1_el1=0 1414id_isar0=34607377 1415id_isar1=34677009 1416id_isar2=555950401 1417id_isar3=17899825 1418id_isar4=268501314 1419id_isar5=0 1420id_mmfr0=270536963 1421id_mmfr1=0 1422id_mmfr2=19070976 1423id_mmfr3=34611729 1424id_pfr0=49 1425id_pfr1=4113 1426midr=1091551472
| 709system=system 710 711[system.cpu0.istage2_mmu] 712type=ArmStage2MMU 713children=stage2_tlb 714eventq_index=0 715stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 716tlb=system.cpu0.itb 717 718[system.cpu0.istage2_mmu.stage2_tlb] 719type=ArmTLB 720children=walker 721eventq_index=0 722is_stage2=true 723size=32 724walker=system.cpu0.istage2_mmu.stage2_tlb.walker 725 726[system.cpu0.istage2_mmu.stage2_tlb.walker] 727type=ArmTableWalker 728clk_domain=system.cpu_clk_domain 729eventq_index=0 730is_stage2=true 731num_squash_per_cycle=2 732sys=system 733port=system.cpu0.toL2Bus.slave[4] 734 735[system.cpu0.itb] 736type=ArmTLB 737children=walker 738eventq_index=0 739is_stage2=false 740size=64 741walker=system.cpu0.itb.walker 742 743[system.cpu0.itb.walker] 744type=ArmTableWalker 745clk_domain=system.cpu_clk_domain 746eventq_index=0 747is_stage2=false 748num_squash_per_cycle=2 749sys=system 750port=system.cpu0.toL2Bus.slave[2] 751 752[system.cpu0.l2cache] 753type=BaseCache 754children=prefetcher tags 755addr_ranges=0:18446744073709551615 756assoc=16 757clk_domain=system.cpu_clk_domain 758eventq_index=0 759forward_snoops=true 760hit_latency=12 761is_top_level=false 762max_miss_count=0 763mshrs=16 764prefetch_on_access=true 765prefetcher=system.cpu0.l2cache.prefetcher 766response_latency=12 767sequential_access=false 768size=1048576 769system=system 770tags=system.cpu0.l2cache.tags 771tgts_per_mshr=8 772two_queue=false 773write_buffers=8 774cpu_side=system.cpu0.toL2Bus.master[0] 775mem_side=system.toL2Bus.slave[0] 776 777[system.cpu0.l2cache.prefetcher] 778type=StridePrefetcher 779clk_domain=system.cpu_clk_domain 780cross_pages=false 781data_accesses_only=false 782degree=8 783eventq_index=0 784inst_tagged=true 785latency=1 786on_miss_only=false 787on_prefetch=true 788on_read_only=false 789serial_squash=false 790size=100 791sys=system 792use_master_id=true 793 794[system.cpu0.l2cache.tags] 795type=RandomRepl 796assoc=16 797block_size=64 798clk_domain=system.cpu_clk_domain 799eventq_index=0 800hit_latency=12 801sequential_access=false 802size=1048576 803 804[system.cpu0.toL2Bus] 805type=CoherentXBar 806clk_domain=system.cpu_clk_domain 807eventq_index=0 808header_cycles=1 809snoop_filter=Null 810system=system 811use_default_range=false 812width=32 813master=system.cpu0.l2cache.cpu_side 814slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port 815 816[system.cpu0.tracer] 817type=ExeTracer 818eventq_index=0 819 820[system.cpu1] 821type=MinorCPU 822children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 823branchPred=system.cpu1.branchPred 824checker=Null 825clk_domain=system.cpu_clk_domain 826cpu_id=1 827decodeCycleInput=true 828decodeInputBufferSize=3 829decodeInputWidth=2 830decodeToExecuteForwardDelay=1 831do_checkpoint_insts=true 832do_quiesce=true 833do_statistics_insts=true 834dstage2_mmu=system.cpu1.dstage2_mmu 835dtb=system.cpu1.dtb 836enableIdling=true 837eventq_index=0 838executeAllowEarlyMemoryIssue=true 839executeBranchDelay=1 840executeCommitLimit=2 841executeCycleInput=true 842executeFuncUnits=system.cpu1.executeFuncUnits 843executeInputBufferSize=7 844executeInputWidth=2 845executeIssueLimit=2 846executeLSQMaxStoreBufferStoresPerCycle=2 847executeLSQRequestsQueueSize=1 848executeLSQStoreBufferSize=5 849executeLSQTransfersQueueSize=2 850executeMaxAccessesInMemory=2 851executeMemoryCommitLimit=1 852executeMemoryIssueLimit=1 853executeMemoryWidth=0 854executeSetTraceTimeOnCommit=true 855executeSetTraceTimeOnIssue=false 856fetch1FetchLimit=1 857fetch1LineSnapWidth=0 858fetch1LineWidth=0 859fetch1ToFetch2BackwardDelay=1 860fetch1ToFetch2ForwardDelay=1 861fetch2CycleInput=true 862fetch2InputBufferSize=2 863fetch2ToDecodeForwardDelay=1 864function_trace=false 865function_trace_start=0 866interrupts=system.cpu1.interrupts 867isa=system.cpu1.isa 868istage2_mmu=system.cpu1.istage2_mmu 869itb=system.cpu1.itb 870max_insts_all_threads=0 871max_insts_any_thread=0 872max_loads_all_threads=0 873max_loads_any_thread=0 874numThreads=1 875profile=0 876progress_interval=0 877simpoint_start_insts= 878socket_id=0 879switched_out=false 880system=system 881tracer=system.cpu1.tracer 882workload= 883dcache_port=system.cpu1.dcache.cpu_side 884icache_port=system.cpu1.icache.cpu_side 885 886[system.cpu1.branchPred] 887type=BranchPredictor 888BTBEntries=4096 889BTBTagSize=16 890RASSize=16 891choiceCtrBits=2 892choicePredictorSize=8192 893eventq_index=0 894globalCtrBits=2 895globalPredictorSize=8192 896instShiftAmt=2 897localCtrBits=2 898localHistoryTableSize=2048 899localPredictorSize=2048 900numThreads=1 901predType=tournament 902 903[system.cpu1.dcache] 904type=BaseCache 905children=tags 906addr_ranges=0:18446744073709551615 907assoc=2 908clk_domain=system.cpu_clk_domain 909eventq_index=0 910forward_snoops=true 911hit_latency=2 912is_top_level=true 913max_miss_count=0 914mshrs=6 915prefetch_on_access=false 916prefetcher=Null 917response_latency=2 918sequential_access=false 919size=32768 920system=system 921tags=system.cpu1.dcache.tags 922tgts_per_mshr=8 923two_queue=false 924write_buffers=16 925cpu_side=system.cpu1.dcache_port 926mem_side=system.cpu1.toL2Bus.slave[1] 927 928[system.cpu1.dcache.tags] 929type=LRU 930assoc=2 931block_size=64 932clk_domain=system.cpu_clk_domain 933eventq_index=0 934hit_latency=2 935sequential_access=false 936size=32768 937 938[system.cpu1.dstage2_mmu] 939type=ArmStage2MMU 940children=stage2_tlb 941eventq_index=0 942stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 943tlb=system.cpu1.dtb 944 945[system.cpu1.dstage2_mmu.stage2_tlb] 946type=ArmTLB 947children=walker 948eventq_index=0 949is_stage2=true 950size=32 951walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 952 953[system.cpu1.dstage2_mmu.stage2_tlb.walker] 954type=ArmTableWalker 955clk_domain=system.cpu_clk_domain 956eventq_index=0 957is_stage2=true 958num_squash_per_cycle=2 959sys=system 960port=system.cpu1.toL2Bus.slave[5] 961 962[system.cpu1.dtb] 963type=ArmTLB 964children=walker 965eventq_index=0 966is_stage2=false 967size=64 968walker=system.cpu1.dtb.walker 969 970[system.cpu1.dtb.walker] 971type=ArmTableWalker 972clk_domain=system.cpu_clk_domain 973eventq_index=0 974is_stage2=false 975num_squash_per_cycle=2 976sys=system 977port=system.cpu1.toL2Bus.slave[3] 978 979[system.cpu1.executeFuncUnits] 980type=MinorFUPool 981children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 982eventq_index=0 983funcUnits=system.cpu1.executeFuncUnits.funcUnits0 system.cpu1.executeFuncUnits.funcUnits1 system.cpu1.executeFuncUnits.funcUnits2 system.cpu1.executeFuncUnits.funcUnits3 system.cpu1.executeFuncUnits.funcUnits4 system.cpu1.executeFuncUnits.funcUnits5 system.cpu1.executeFuncUnits.funcUnits6 984 985[system.cpu1.executeFuncUnits.funcUnits0] 986type=MinorFU 987children=opClasses timings 988cantForwardFromFUIndices= 989eventq_index=0 990issueLat=1 991opClasses=system.cpu1.executeFuncUnits.funcUnits0.opClasses 992opLat=3 993timings=system.cpu1.executeFuncUnits.funcUnits0.timings 994 995[system.cpu1.executeFuncUnits.funcUnits0.opClasses] 996type=MinorOpClassSet 997children=opClasses 998eventq_index=0 999opClasses=system.cpu1.executeFuncUnits.funcUnits0.opClasses.opClasses 1000 1001[system.cpu1.executeFuncUnits.funcUnits0.opClasses.opClasses] 1002type=MinorOpClass 1003eventq_index=0 1004opClass=IntAlu 1005 1006[system.cpu1.executeFuncUnits.funcUnits0.timings] 1007type=MinorFUTiming 1008children=opClasses 1009description=Int 1010eventq_index=0 1011extraAssumedLat=0 1012extraCommitLat=0 1013extraCommitLatExpr=Null 1014mask=0 1015match=0 1016opClasses=system.cpu1.executeFuncUnits.funcUnits0.timings.opClasses 1017srcRegsRelativeLats=2 1018suppress=false 1019 1020[system.cpu1.executeFuncUnits.funcUnits0.timings.opClasses] 1021type=MinorOpClassSet 1022eventq_index=0 1023opClasses= 1024 1025[system.cpu1.executeFuncUnits.funcUnits1] 1026type=MinorFU 1027children=opClasses timings 1028cantForwardFromFUIndices= 1029eventq_index=0 1030issueLat=1 1031opClasses=system.cpu1.executeFuncUnits.funcUnits1.opClasses 1032opLat=3 1033timings=system.cpu1.executeFuncUnits.funcUnits1.timings 1034 1035[system.cpu1.executeFuncUnits.funcUnits1.opClasses] 1036type=MinorOpClassSet 1037children=opClasses 1038eventq_index=0 1039opClasses=system.cpu1.executeFuncUnits.funcUnits1.opClasses.opClasses 1040 1041[system.cpu1.executeFuncUnits.funcUnits1.opClasses.opClasses] 1042type=MinorOpClass 1043eventq_index=0 1044opClass=IntAlu 1045 1046[system.cpu1.executeFuncUnits.funcUnits1.timings] 1047type=MinorFUTiming 1048children=opClasses 1049description=Int 1050eventq_index=0 1051extraAssumedLat=0 1052extraCommitLat=0 1053extraCommitLatExpr=Null 1054mask=0 1055match=0 1056opClasses=system.cpu1.executeFuncUnits.funcUnits1.timings.opClasses 1057srcRegsRelativeLats=2 1058suppress=false 1059 1060[system.cpu1.executeFuncUnits.funcUnits1.timings.opClasses] 1061type=MinorOpClassSet 1062eventq_index=0 1063opClasses= 1064 1065[system.cpu1.executeFuncUnits.funcUnits2] 1066type=MinorFU 1067children=opClasses timings 1068cantForwardFromFUIndices= 1069eventq_index=0 1070issueLat=1 1071opClasses=system.cpu1.executeFuncUnits.funcUnits2.opClasses 1072opLat=3 1073timings=system.cpu1.executeFuncUnits.funcUnits2.timings 1074 1075[system.cpu1.executeFuncUnits.funcUnits2.opClasses] 1076type=MinorOpClassSet 1077children=opClasses 1078eventq_index=0 1079opClasses=system.cpu1.executeFuncUnits.funcUnits2.opClasses.opClasses 1080 1081[system.cpu1.executeFuncUnits.funcUnits2.opClasses.opClasses] 1082type=MinorOpClass 1083eventq_index=0 1084opClass=IntMult 1085 1086[system.cpu1.executeFuncUnits.funcUnits2.timings] 1087type=MinorFUTiming 1088children=opClasses 1089description=Mul 1090eventq_index=0 1091extraAssumedLat=0 1092extraCommitLat=0 1093extraCommitLatExpr=Null 1094mask=0 1095match=0 1096opClasses=system.cpu1.executeFuncUnits.funcUnits2.timings.opClasses 1097srcRegsRelativeLats=0 1098suppress=false 1099 1100[system.cpu1.executeFuncUnits.funcUnits2.timings.opClasses] 1101type=MinorOpClassSet 1102eventq_index=0 1103opClasses= 1104 1105[system.cpu1.executeFuncUnits.funcUnits3] 1106type=MinorFU 1107children=opClasses 1108cantForwardFromFUIndices= 1109eventq_index=0 1110issueLat=9 1111opClasses=system.cpu1.executeFuncUnits.funcUnits3.opClasses 1112opLat=9 1113timings= 1114 1115[system.cpu1.executeFuncUnits.funcUnits3.opClasses] 1116type=MinorOpClassSet 1117children=opClasses 1118eventq_index=0 1119opClasses=system.cpu1.executeFuncUnits.funcUnits3.opClasses.opClasses 1120 1121[system.cpu1.executeFuncUnits.funcUnits3.opClasses.opClasses] 1122type=MinorOpClass 1123eventq_index=0 1124opClass=IntDiv 1125 1126[system.cpu1.executeFuncUnits.funcUnits4] 1127type=MinorFU 1128children=opClasses timings 1129cantForwardFromFUIndices= 1130eventq_index=0 1131issueLat=1 1132opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses 1133opLat=6 1134timings=system.cpu1.executeFuncUnits.funcUnits4.timings 1135 1136[system.cpu1.executeFuncUnits.funcUnits4.opClasses] 1137type=MinorOpClassSet 1138children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 1139eventq_index=0 1140opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25 1141 1142[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00] 1143type=MinorOpClass 1144eventq_index=0 1145opClass=FloatAdd 1146 1147[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01] 1148type=MinorOpClass 1149eventq_index=0 1150opClass=FloatCmp 1151 1152[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02] 1153type=MinorOpClass 1154eventq_index=0 1155opClass=FloatCvt 1156 1157[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03] 1158type=MinorOpClass 1159eventq_index=0 1160opClass=FloatMult 1161 1162[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04] 1163type=MinorOpClass 1164eventq_index=0 1165opClass=FloatDiv 1166 1167[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05] 1168type=MinorOpClass 1169eventq_index=0 1170opClass=FloatSqrt 1171 1172[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06] 1173type=MinorOpClass 1174eventq_index=0 1175opClass=SimdAdd 1176 1177[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07] 1178type=MinorOpClass 1179eventq_index=0 1180opClass=SimdAddAcc 1181 1182[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08] 1183type=MinorOpClass 1184eventq_index=0 1185opClass=SimdAlu 1186 1187[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09] 1188type=MinorOpClass 1189eventq_index=0 1190opClass=SimdCmp 1191 1192[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10] 1193type=MinorOpClass 1194eventq_index=0 1195opClass=SimdCvt 1196 1197[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11] 1198type=MinorOpClass 1199eventq_index=0 1200opClass=SimdMisc 1201 1202[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12] 1203type=MinorOpClass 1204eventq_index=0 1205opClass=SimdMult 1206 1207[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13] 1208type=MinorOpClass 1209eventq_index=0 1210opClass=SimdMultAcc 1211 1212[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14] 1213type=MinorOpClass 1214eventq_index=0 1215opClass=SimdShift 1216 1217[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15] 1218type=MinorOpClass 1219eventq_index=0 1220opClass=SimdShiftAcc 1221 1222[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16] 1223type=MinorOpClass 1224eventq_index=0 1225opClass=SimdSqrt 1226 1227[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17] 1228type=MinorOpClass 1229eventq_index=0 1230opClass=SimdFloatAdd 1231 1232[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18] 1233type=MinorOpClass 1234eventq_index=0 1235opClass=SimdFloatAlu 1236 1237[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19] 1238type=MinorOpClass 1239eventq_index=0 1240opClass=SimdFloatCmp 1241 1242[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20] 1243type=MinorOpClass 1244eventq_index=0 1245opClass=SimdFloatCvt 1246 1247[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21] 1248type=MinorOpClass 1249eventq_index=0 1250opClass=SimdFloatDiv 1251 1252[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22] 1253type=MinorOpClass 1254eventq_index=0 1255opClass=SimdFloatMisc 1256 1257[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23] 1258type=MinorOpClass 1259eventq_index=0 1260opClass=SimdFloatMult 1261 1262[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24] 1263type=MinorOpClass 1264eventq_index=0 1265opClass=SimdFloatMultAcc 1266 1267[system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25] 1268type=MinorOpClass 1269eventq_index=0 1270opClass=SimdFloatSqrt 1271 1272[system.cpu1.executeFuncUnits.funcUnits4.timings] 1273type=MinorFUTiming 1274children=opClasses 1275description=FloatSimd 1276eventq_index=0 1277extraAssumedLat=0 1278extraCommitLat=0 1279extraCommitLatExpr=Null 1280mask=0 1281match=0 1282opClasses=system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses 1283srcRegsRelativeLats=2 1284suppress=false 1285 1286[system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses] 1287type=MinorOpClassSet 1288eventq_index=0 1289opClasses= 1290 1291[system.cpu1.executeFuncUnits.funcUnits5] 1292type=MinorFU 1293children=opClasses timings 1294cantForwardFromFUIndices= 1295eventq_index=0 1296issueLat=1 1297opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses 1298opLat=1 1299timings=system.cpu1.executeFuncUnits.funcUnits5.timings 1300 1301[system.cpu1.executeFuncUnits.funcUnits5.opClasses] 1302type=MinorOpClassSet 1303children=opClasses0 opClasses1 1304eventq_index=0 1305opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1 1306 1307[system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0] 1308type=MinorOpClass 1309eventq_index=0 1310opClass=MemRead 1311 1312[system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1] 1313type=MinorOpClass 1314eventq_index=0 1315opClass=MemWrite 1316 1317[system.cpu1.executeFuncUnits.funcUnits5.timings] 1318type=MinorFUTiming 1319children=opClasses 1320description=Mem 1321eventq_index=0 1322extraAssumedLat=2 1323extraCommitLat=0 1324extraCommitLatExpr=Null 1325mask=0 1326match=0 1327opClasses=system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses 1328srcRegsRelativeLats=1 1329suppress=false 1330 1331[system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses] 1332type=MinorOpClassSet 1333eventq_index=0 1334opClasses= 1335 1336[system.cpu1.executeFuncUnits.funcUnits6] 1337type=MinorFU 1338children=opClasses 1339cantForwardFromFUIndices= 1340eventq_index=0 1341issueLat=1 1342opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses 1343opLat=1 1344timings= 1345 1346[system.cpu1.executeFuncUnits.funcUnits6.opClasses] 1347type=MinorOpClassSet 1348children=opClasses0 opClasses1 1349eventq_index=0 1350opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1 1351 1352[system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0] 1353type=MinorOpClass 1354eventq_index=0 1355opClass=IprAccess 1356 1357[system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1] 1358type=MinorOpClass 1359eventq_index=0 1360opClass=InstPrefetch 1361 1362[system.cpu1.icache] 1363type=BaseCache 1364children=tags 1365addr_ranges=0:18446744073709551615 1366assoc=2 1367clk_domain=system.cpu_clk_domain 1368eventq_index=0 1369forward_snoops=true 1370hit_latency=1 1371is_top_level=true 1372max_miss_count=0 1373mshrs=2 1374prefetch_on_access=false 1375prefetcher=Null 1376response_latency=1 1377sequential_access=false 1378size=32768 1379system=system 1380tags=system.cpu1.icache.tags 1381tgts_per_mshr=8 1382two_queue=false 1383write_buffers=8 1384cpu_side=system.cpu1.icache_port 1385mem_side=system.cpu1.toL2Bus.slave[0] 1386 1387[system.cpu1.icache.tags] 1388type=LRU 1389assoc=2 1390block_size=64 1391clk_domain=system.cpu_clk_domain 1392eventq_index=0 1393hit_latency=1 1394sequential_access=false 1395size=32768 1396 1397[system.cpu1.interrupts] 1398type=ArmInterrupts 1399eventq_index=0 1400 1401[system.cpu1.isa] 1402type=ArmISA 1403eventq_index=0 1404fpsid=1090793632 1405id_aa64afr0_el1=0 1406id_aa64afr1_el1=0 1407id_aa64dfr0_el1=1052678 1408id_aa64dfr1_el1=0 1409id_aa64isar0_el1=0 1410id_aa64isar1_el1=0 1411id_aa64mmfr0_el1=15728642 1412id_aa64mmfr1_el1=0 1413id_aa64pfr0_el1=17 1414id_aa64pfr1_el1=0 1415id_isar0=34607377 1416id_isar1=34677009 1417id_isar2=555950401 1418id_isar3=17899825 1419id_isar4=268501314 1420id_isar5=0 1421id_mmfr0=270536963 1422id_mmfr1=0 1423id_mmfr2=19070976 1424id_mmfr3=34611729 1425id_pfr0=49 1426id_pfr1=4113 1427midr=1091551472
|
| 1428pmu=Null
|
1427system=system 1428 1429[system.cpu1.istage2_mmu] 1430type=ArmStage2MMU 1431children=stage2_tlb 1432eventq_index=0 1433stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1434tlb=system.cpu1.itb 1435 1436[system.cpu1.istage2_mmu.stage2_tlb] 1437type=ArmTLB 1438children=walker 1439eventq_index=0 1440is_stage2=true 1441size=32 1442walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1443 1444[system.cpu1.istage2_mmu.stage2_tlb.walker] 1445type=ArmTableWalker 1446clk_domain=system.cpu_clk_domain 1447eventq_index=0 1448is_stage2=true 1449num_squash_per_cycle=2 1450sys=system 1451port=system.cpu1.toL2Bus.slave[4] 1452 1453[system.cpu1.itb] 1454type=ArmTLB 1455children=walker 1456eventq_index=0 1457is_stage2=false 1458size=64 1459walker=system.cpu1.itb.walker 1460 1461[system.cpu1.itb.walker] 1462type=ArmTableWalker 1463clk_domain=system.cpu_clk_domain 1464eventq_index=0 1465is_stage2=false 1466num_squash_per_cycle=2 1467sys=system 1468port=system.cpu1.toL2Bus.slave[2] 1469 1470[system.cpu1.l2cache] 1471type=BaseCache 1472children=prefetcher tags 1473addr_ranges=0:18446744073709551615 1474assoc=16 1475clk_domain=system.cpu_clk_domain 1476eventq_index=0 1477forward_snoops=true 1478hit_latency=12 1479is_top_level=false 1480max_miss_count=0 1481mshrs=16 1482prefetch_on_access=true 1483prefetcher=system.cpu1.l2cache.prefetcher 1484response_latency=12 1485sequential_access=false 1486size=1048576 1487system=system 1488tags=system.cpu1.l2cache.tags 1489tgts_per_mshr=8 1490two_queue=false 1491write_buffers=8 1492cpu_side=system.cpu1.toL2Bus.master[0] 1493mem_side=system.toL2Bus.slave[1] 1494 1495[system.cpu1.l2cache.prefetcher] 1496type=StridePrefetcher 1497clk_domain=system.cpu_clk_domain 1498cross_pages=false 1499data_accesses_only=false 1500degree=8 1501eventq_index=0 1502inst_tagged=true 1503latency=1 1504on_miss_only=false 1505on_prefetch=true 1506on_read_only=false 1507serial_squash=false 1508size=100 1509sys=system 1510use_master_id=true 1511 1512[system.cpu1.l2cache.tags] 1513type=RandomRepl 1514assoc=16 1515block_size=64 1516clk_domain=system.cpu_clk_domain 1517eventq_index=0 1518hit_latency=12 1519sequential_access=false 1520size=1048576 1521 1522[system.cpu1.toL2Bus] 1523type=CoherentXBar 1524clk_domain=system.cpu_clk_domain 1525eventq_index=0 1526header_cycles=1 1527snoop_filter=Null 1528system=system 1529use_default_range=false 1530width=32 1531master=system.cpu1.l2cache.cpu_side 1532slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port system.cpu1.istage2_mmu.stage2_tlb.walker.port system.cpu1.dstage2_mmu.stage2_tlb.walker.port 1533 1534[system.cpu1.tracer] 1535type=ExeTracer 1536eventq_index=0 1537 1538[system.cpu_clk_domain] 1539type=SrcClockDomain 1540clock=500 1541domain_id=-1 1542eventq_index=0 1543init_perf_level=0 1544voltage_domain=system.voltage_domain 1545 1546[system.dvfs_handler] 1547type=DVFSHandler 1548domains= 1549enable=false 1550eventq_index=0 1551sys_clk_domain=system.clk_domain 1552transition_latency=100000000 1553 1554[system.intrctrl] 1555type=IntrControl 1556eventq_index=0 1557sys=system 1558 1559[system.iobus] 1560type=NoncoherentXBar 1561clk_domain=system.clk_domain 1562eventq_index=0 1563header_cycles=1
| 1429system=system 1430 1431[system.cpu1.istage2_mmu] 1432type=ArmStage2MMU 1433children=stage2_tlb 1434eventq_index=0 1435stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1436tlb=system.cpu1.itb 1437 1438[system.cpu1.istage2_mmu.stage2_tlb] 1439type=ArmTLB 1440children=walker 1441eventq_index=0 1442is_stage2=true 1443size=32 1444walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1445 1446[system.cpu1.istage2_mmu.stage2_tlb.walker] 1447type=ArmTableWalker 1448clk_domain=system.cpu_clk_domain 1449eventq_index=0 1450is_stage2=true 1451num_squash_per_cycle=2 1452sys=system 1453port=system.cpu1.toL2Bus.slave[4] 1454 1455[system.cpu1.itb] 1456type=ArmTLB 1457children=walker 1458eventq_index=0 1459is_stage2=false 1460size=64 1461walker=system.cpu1.itb.walker 1462 1463[system.cpu1.itb.walker] 1464type=ArmTableWalker 1465clk_domain=system.cpu_clk_domain 1466eventq_index=0 1467is_stage2=false 1468num_squash_per_cycle=2 1469sys=system 1470port=system.cpu1.toL2Bus.slave[2] 1471 1472[system.cpu1.l2cache] 1473type=BaseCache 1474children=prefetcher tags 1475addr_ranges=0:18446744073709551615 1476assoc=16 1477clk_domain=system.cpu_clk_domain 1478eventq_index=0 1479forward_snoops=true 1480hit_latency=12 1481is_top_level=false 1482max_miss_count=0 1483mshrs=16 1484prefetch_on_access=true 1485prefetcher=system.cpu1.l2cache.prefetcher 1486response_latency=12 1487sequential_access=false 1488size=1048576 1489system=system 1490tags=system.cpu1.l2cache.tags 1491tgts_per_mshr=8 1492two_queue=false 1493write_buffers=8 1494cpu_side=system.cpu1.toL2Bus.master[0] 1495mem_side=system.toL2Bus.slave[1] 1496 1497[system.cpu1.l2cache.prefetcher] 1498type=StridePrefetcher 1499clk_domain=system.cpu_clk_domain 1500cross_pages=false 1501data_accesses_only=false 1502degree=8 1503eventq_index=0 1504inst_tagged=true 1505latency=1 1506on_miss_only=false 1507on_prefetch=true 1508on_read_only=false 1509serial_squash=false 1510size=100 1511sys=system 1512use_master_id=true 1513 1514[system.cpu1.l2cache.tags] 1515type=RandomRepl 1516assoc=16 1517block_size=64 1518clk_domain=system.cpu_clk_domain 1519eventq_index=0 1520hit_latency=12 1521sequential_access=false 1522size=1048576 1523 1524[system.cpu1.toL2Bus] 1525type=CoherentXBar 1526clk_domain=system.cpu_clk_domain 1527eventq_index=0 1528header_cycles=1 1529snoop_filter=Null 1530system=system 1531use_default_range=false 1532width=32 1533master=system.cpu1.l2cache.cpu_side 1534slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port system.cpu1.istage2_mmu.stage2_tlb.walker.port system.cpu1.dstage2_mmu.stage2_tlb.walker.port 1535 1536[system.cpu1.tracer] 1537type=ExeTracer 1538eventq_index=0 1539 1540[system.cpu_clk_domain] 1541type=SrcClockDomain 1542clock=500 1543domain_id=-1 1544eventq_index=0 1545init_perf_level=0 1546voltage_domain=system.voltage_domain 1547 1548[system.dvfs_handler] 1549type=DVFSHandler 1550domains= 1551enable=false 1552eventq_index=0 1553sys_clk_domain=system.clk_domain 1554transition_latency=100000000 1555 1556[system.intrctrl] 1557type=IntrControl 1558eventq_index=0 1559sys=system 1560 1561[system.iobus] 1562type=NoncoherentXBar 1563clk_domain=system.clk_domain 1564eventq_index=0 1565header_cycles=1
|
1564use_default_range=false
| 1566use_default_range=true
|
1565width=8
| 1567width=8
|
1566master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side 1567slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
| 1568default=system.realview.pciconfig.pio 1569master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side 1570slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
1568 1569[system.iocache] 1570type=BaseCache 1571children=tags
| 1571 1572[system.iocache] 1573type=BaseCache 1574children=tags
|
1572addr_ranges=0:134217727
| 1575addr_ranges=2147483648:2415919103
|
1573assoc=8 1574clk_domain=system.clk_domain 1575eventq_index=0 1576forward_snoops=false 1577hit_latency=50 1578is_top_level=true 1579max_miss_count=0 1580mshrs=20 1581prefetch_on_access=false 1582prefetcher=Null 1583response_latency=50 1584sequential_access=false 1585size=1024 1586system=system 1587tags=system.iocache.tags 1588tgts_per_mshr=12 1589two_queue=false 1590write_buffers=8
| 1576assoc=8 1577clk_domain=system.clk_domain 1578eventq_index=0 1579forward_snoops=false 1580hit_latency=50 1581is_top_level=true 1582max_miss_count=0 1583mshrs=20 1584prefetch_on_access=false 1585prefetcher=Null 1586response_latency=50 1587sequential_access=false 1588size=1024 1589system=system 1590tags=system.iocache.tags 1591tgts_per_mshr=12 1592two_queue=false 1593write_buffers=8
|
1591cpu_side=system.iobus.master[26] 1592mem_side=system.membus.slave[2]
| 1594cpu_side=system.iobus.master[27] 1595mem_side=system.membus.slave[3]
|
1593 1594[system.iocache.tags] 1595type=LRU 1596assoc=8 1597block_size=64 1598clk_domain=system.clk_domain 1599eventq_index=0 1600hit_latency=50 1601sequential_access=false 1602size=1024 1603 1604[system.l2c] 1605type=BaseCache 1606children=tags 1607addr_ranges=0:18446744073709551615 1608assoc=8 1609clk_domain=system.cpu_clk_domain 1610eventq_index=0 1611forward_snoops=true 1612hit_latency=20 1613is_top_level=false 1614max_miss_count=0 1615mshrs=20 1616prefetch_on_access=false 1617prefetcher=Null 1618response_latency=20 1619sequential_access=false 1620size=4194304 1621system=system 1622tags=system.l2c.tags 1623tgts_per_mshr=12 1624two_queue=false 1625write_buffers=8 1626cpu_side=system.toL2Bus.master[0]
| 1596 1597[system.iocache.tags] 1598type=LRU 1599assoc=8 1600block_size=64 1601clk_domain=system.clk_domain 1602eventq_index=0 1603hit_latency=50 1604sequential_access=false 1605size=1024 1606 1607[system.l2c] 1608type=BaseCache 1609children=tags 1610addr_ranges=0:18446744073709551615 1611assoc=8 1612clk_domain=system.cpu_clk_domain 1613eventq_index=0 1614forward_snoops=true 1615hit_latency=20 1616is_top_level=false 1617max_miss_count=0 1618mshrs=20 1619prefetch_on_access=false 1620prefetcher=Null 1621response_latency=20 1622sequential_access=false 1623size=4194304 1624system=system 1625tags=system.l2c.tags 1626tgts_per_mshr=12 1627two_queue=false 1628write_buffers=8 1629cpu_side=system.toL2Bus.master[0]
|
1627mem_side=system.membus.slave[1]
| 1630mem_side=system.membus.slave[2]
|
1628 1629[system.l2c.tags] 1630type=LRU 1631assoc=8 1632block_size=64 1633clk_domain=system.cpu_clk_domain 1634eventq_index=0 1635hit_latency=20 1636sequential_access=false 1637size=4194304 1638 1639[system.membus] 1640type=CoherentXBar 1641children=badaddr_responder 1642clk_domain=system.clk_domain 1643eventq_index=0 1644header_cycles=1 1645snoop_filter=Null 1646system=system 1647use_default_range=false 1648width=8 1649default=system.membus.badaddr_responder.pio
| 1631 1632[system.l2c.tags] 1633type=LRU 1634assoc=8 1635block_size=64 1636clk_domain=system.cpu_clk_domain 1637eventq_index=0 1638hit_latency=20 1639sequential_access=false 1640size=4194304 1641 1642[system.membus] 1643type=CoherentXBar 1644children=badaddr_responder 1645clk_domain=system.clk_domain 1646eventq_index=0 1647header_cycles=1 1648snoop_filter=Null 1649system=system 1650use_default_range=false 1651width=8 1652default=system.membus.badaddr_responder.pio
|
1650master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port 1651slave=system.system_port system.l2c.mem_side system.iocache.mem_side
| 1653master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port 1654slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
|
1652 1653[system.membus.badaddr_responder] 1654type=IsaFake 1655clk_domain=system.clk_domain 1656eventq_index=0 1657fake_mem=false 1658pio_addr=0 1659pio_latency=100000 1660pio_size=8 1661ret_bad_addr=true 1662ret_data16=65535 1663ret_data32=4294967295 1664ret_data64=18446744073709551615 1665ret_data8=255 1666system=system 1667update_data=false 1668warn_access=warn 1669pio=system.membus.default 1670 1671[system.physmem] 1672type=DRAMCtrl 1673IDD0=0.075000 1674IDD02=0.000000 1675IDD2N=0.050000 1676IDD2N2=0.000000 1677IDD2P0=0.000000 1678IDD2P02=0.000000 1679IDD2P1=0.000000 1680IDD2P12=0.000000 1681IDD3N=0.057000 1682IDD3N2=0.000000 1683IDD3P0=0.000000 1684IDD3P02=0.000000 1685IDD3P1=0.000000 1686IDD3P12=0.000000 1687IDD4R=0.187000 1688IDD4R2=0.000000 1689IDD4W=0.165000 1690IDD4W2=0.000000 1691IDD5=0.220000 1692IDD52=0.000000 1693IDD6=0.000000 1694IDD62=0.000000 1695VDD=1.500000 1696VDD2=0.000000 1697activation_limit=4 1698addr_mapping=RoRaBaChCo 1699bank_groups_per_rank=0 1700banks_per_rank=8 1701burst_length=8 1702channels=1 1703clk_domain=system.clk_domain 1704conf_table_reported=true 1705device_bus_width=8 1706device_rowbuffer_size=1024
| 1655 1656[system.membus.badaddr_responder] 1657type=IsaFake 1658clk_domain=system.clk_domain 1659eventq_index=0 1660fake_mem=false 1661pio_addr=0 1662pio_latency=100000 1663pio_size=8 1664ret_bad_addr=true 1665ret_data16=65535 1666ret_data32=4294967295 1667ret_data64=18446744073709551615 1668ret_data8=255 1669system=system 1670update_data=false 1671warn_access=warn 1672pio=system.membus.default 1673 1674[system.physmem] 1675type=DRAMCtrl 1676IDD0=0.075000 1677IDD02=0.000000 1678IDD2N=0.050000 1679IDD2N2=0.000000 1680IDD2P0=0.000000 1681IDD2P02=0.000000 1682IDD2P1=0.000000 1683IDD2P12=0.000000 1684IDD3N=0.057000 1685IDD3N2=0.000000 1686IDD3P0=0.000000 1687IDD3P02=0.000000 1688IDD3P1=0.000000 1689IDD3P12=0.000000 1690IDD4R=0.187000 1691IDD4R2=0.000000 1692IDD4W=0.165000 1693IDD4W2=0.000000 1694IDD5=0.220000 1695IDD52=0.000000 1696IDD6=0.000000 1697IDD62=0.000000 1698VDD=1.500000 1699VDD2=0.000000 1700activation_limit=4 1701addr_mapping=RoRaBaChCo 1702bank_groups_per_rank=0 1703banks_per_rank=8 1704burst_length=8 1705channels=1 1706clk_domain=system.clk_domain 1707conf_table_reported=true 1708device_bus_width=8 1709device_rowbuffer_size=1024
|
| 1710device_size=536870912
|
1707devices_per_rank=8 1708dll=true 1709eventq_index=0 1710in_addr_map=true 1711max_accesses_per_row=16 1712mem_sched_policy=frfcfs 1713min_writes_per_switch=16 1714null=false 1715page_policy=open_adaptive
| 1711devices_per_rank=8 1712dll=true 1713eventq_index=0 1714in_addr_map=true 1715max_accesses_per_row=16 1716mem_sched_policy=frfcfs 1717min_writes_per_switch=16 1718null=false 1719page_policy=open_adaptive
|
1716range=0:134217727
| 1720range=2147483648:2415919103
|
1717ranks_per_channel=2 1718read_buffer_size=32 1719static_backend_latency=10000 1720static_frontend_latency=10000 1721tBURST=5000 1722tCCD_L=0 1723tCK=1250 1724tCL=13750 1725tCS=2500 1726tRAS=35000 1727tRCD=13750 1728tREFI=7800000 1729tRFC=260000 1730tRP=13750 1731tRRD=6000 1732tRRD_L=0 1733tRTP=7500 1734tRTW=2500 1735tWR=15000 1736tWTR=7500 1737tXAW=30000 1738tXP=0 1739tXPDLL=0 1740tXS=0 1741tXSDLL=0 1742write_buffer_size=64 1743write_high_thresh_perc=85 1744write_low_thresh_perc=50
| 1721ranks_per_channel=2 1722read_buffer_size=32 1723static_backend_latency=10000 1724static_frontend_latency=10000 1725tBURST=5000 1726tCCD_L=0 1727tCK=1250 1728tCL=13750 1729tCS=2500 1730tRAS=35000 1731tRCD=13750 1732tREFI=7800000 1733tRFC=260000 1734tRP=13750 1735tRRD=6000 1736tRRD_L=0 1737tRTP=7500 1738tRTW=2500 1739tWR=15000 1740tWTR=7500 1741tXAW=30000 1742tXP=0 1743tXPDLL=0 1744tXS=0 1745tXSDLL=0 1746write_buffer_size=64 1747write_high_thresh_perc=85 1748write_low_thresh_perc=50
|
1745port=system.membus.master[6]
| 1749port=system.membus.master[5]
|
1746 1747[system.realview] 1748type=RealView
| 1750 1751[system.realview] 1752type=RealView
|
1749children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
| 1753children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
1750eventq_index=0 1751intrctrl=system.intrctrl
| 1754eventq_index=0 1755intrctrl=system.intrctrl
|
1752pci_cfg_base=0
| 1756pci_cfg_base=805306368
|
1753pci_cfg_gen_offsets=false 1754pci_io_base=0 1755system=system 1756
| 1757pci_cfg_gen_offsets=false 1758pci_io_base=0 1759system=system 1760
|
1757[system.realview.a9scu] 1758type=A9SCU 1759clk_domain=system.clk_domain 1760eventq_index=0 1761pio_addr=520093696 1762pio_latency=100000 1763system=system 1764pio=system.membus.master[4] 1765
| |
1766[system.realview.aaci_fake] 1767type=AmbaFake 1768amba_id=0 1769clk_domain=system.clk_domain 1770eventq_index=0 1771ignore_access=false
| 1761[system.realview.aaci_fake] 1762type=AmbaFake 1763amba_id=0 1764clk_domain=system.clk_domain 1765eventq_index=0 1766ignore_access=false
|
1772pio_addr=268451840
| 1767pio_addr=470024192
|
1773pio_latency=100000 1774system=system
| 1768pio_latency=100000 1769system=system
|
1775pio=system.iobus.master[21]
| 1770pio=system.iobus.master[18]
|
1776 1777[system.realview.cf_ctrl] 1778type=IdeController
| 1771 1772[system.realview.cf_ctrl] 1773type=IdeController
|
1779BAR0=402653184
| 1774BAR0=471465984
|
1780BAR0LegacyIO=true
| 1775BAR0LegacyIO=true
|
1781BAR0Size=16 1782BAR1=402653440
| 1776BAR0Size=256 1777BAR1=471466240
|
1783BAR1LegacyIO=true
| 1778BAR1LegacyIO=true
|
1784BAR1Size=1
| 1779BAR1Size=4096
|
1785BAR2=1 1786BAR2LegacyIO=false 1787BAR2Size=8 1788BAR3=1 1789BAR3LegacyIO=false 1790BAR3Size=4 1791BAR4=1 1792BAR4LegacyIO=false 1793BAR4Size=16 1794BAR5=1 1795BAR5LegacyIO=false 1796BAR5Size=0 1797BIST=0 1798CacheLineSize=0 1799CapabilityPtr=0 1800CardbusCIS=0 1801ClassCode=1 1802Command=1 1803DeviceID=28945 1804ExpansionROM=0 1805HeaderType=0 1806InterruptLine=31 1807InterruptPin=1 1808LatencyTimer=0 1809LegacyIOBase=0 1810MSICAPBaseOffset=0 1811MSICAPCapId=0 1812MSICAPMaskBits=0 1813MSICAPMsgAddr=0 1814MSICAPMsgCtrl=0 1815MSICAPMsgData=0 1816MSICAPMsgUpperAddr=0 1817MSICAPNextCapability=0 1818MSICAPPendingBits=0 1819MSIXCAPBaseOffset=0 1820MSIXCAPCapId=0 1821MSIXCAPNextCapability=0 1822MSIXMsgCtrl=0 1823MSIXPbaOffset=0 1824MSIXTableOffset=0 1825MaximumLatency=0 1826MinimumGrant=0 1827PMCAPBaseOffset=0 1828PMCAPCapId=0 1829PMCAPCapabilities=0 1830PMCAPCtrlStatus=0 1831PMCAPNextCapability=0 1832PXCAPBaseOffset=0 1833PXCAPCapId=0 1834PXCAPCapabilities=0 1835PXCAPDevCap2=0 1836PXCAPDevCapabilities=0 1837PXCAPDevCtrl=0 1838PXCAPDevCtrl2=0 1839PXCAPDevStatus=0 1840PXCAPLinkCap=0 1841PXCAPLinkCtrl=0 1842PXCAPLinkStatus=0 1843PXCAPNextCapability=0 1844ProgIF=133 1845Revision=0 1846Status=640 1847SubClassCode=1 1848SubsystemID=0 1849SubsystemVendorID=0 1850VendorID=32902 1851clk_domain=system.clk_domain 1852config_latency=20000 1853ctrl_offset=2
| 1780BAR2=1 1781BAR2LegacyIO=false 1782BAR2Size=8 1783BAR3=1 1784BAR3LegacyIO=false 1785BAR3Size=4 1786BAR4=1 1787BAR4LegacyIO=false 1788BAR4Size=16 1789BAR5=1 1790BAR5LegacyIO=false 1791BAR5Size=0 1792BIST=0 1793CacheLineSize=0 1794CapabilityPtr=0 1795CardbusCIS=0 1796ClassCode=1 1797Command=1 1798DeviceID=28945 1799ExpansionROM=0 1800HeaderType=0 1801InterruptLine=31 1802InterruptPin=1 1803LatencyTimer=0 1804LegacyIOBase=0 1805MSICAPBaseOffset=0 1806MSICAPCapId=0 1807MSICAPMaskBits=0 1808MSICAPMsgAddr=0 1809MSICAPMsgCtrl=0 1810MSICAPMsgData=0 1811MSICAPMsgUpperAddr=0 1812MSICAPNextCapability=0 1813MSICAPPendingBits=0 1814MSIXCAPBaseOffset=0 1815MSIXCAPCapId=0 1816MSIXCAPNextCapability=0 1817MSIXMsgCtrl=0 1818MSIXPbaOffset=0 1819MSIXTableOffset=0 1820MaximumLatency=0 1821MinimumGrant=0 1822PMCAPBaseOffset=0 1823PMCAPCapId=0 1824PMCAPCapabilities=0 1825PMCAPCtrlStatus=0 1826PMCAPNextCapability=0 1827PXCAPBaseOffset=0 1828PXCAPCapId=0 1829PXCAPCapabilities=0 1830PXCAPDevCap2=0 1831PXCAPDevCapabilities=0 1832PXCAPDevCtrl=0 1833PXCAPDevCtrl2=0 1834PXCAPDevStatus=0 1835PXCAPLinkCap=0 1836PXCAPLinkCtrl=0 1837PXCAPLinkStatus=0 1838PXCAPNextCapability=0 1839ProgIF=133 1840Revision=0 1841Status=640 1842SubClassCode=1 1843SubsystemID=0 1844SubsystemVendorID=0 1845VendorID=32902 1846clk_domain=system.clk_domain 1847config_latency=20000 1848ctrl_offset=2
|
1854disks=system.cf0
| 1849disks=
|
1855eventq_index=0
| 1850eventq_index=0
|
1856io_shift=1
| 1851io_shift=2
|
1857pci_bus=2
| 1852pci_bus=2
|
1858pci_dev=7
| 1853pci_dev=0
|
1859pci_func=0 1860pio_latency=30000 1861platform=system.realview 1862system=system
| 1854pci_func=0 1855pio_latency=30000 1856platform=system.realview 1857system=system
|
1863config=system.iobus.master[8]
| 1858config=system.iobus.master[9]
|
1864dma=system.iobus.slave[2]
| 1859dma=system.iobus.slave[2]
|
1865pio=system.iobus.master[7]
| 1860pio=system.iobus.master[8]
|
1866 1867[system.realview.clcd] 1868type=Pl111 1869amba_id=1315089 1870clk_domain=system.clk_domain 1871enable_capture=true 1872eventq_index=0 1873gic=system.realview.gic
| 1861 1862[system.realview.clcd] 1863type=Pl111 1864amba_id=1315089 1865clk_domain=system.clk_domain 1866enable_capture=true 1867eventq_index=0 1868gic=system.realview.gic
|
1874int_num=55 1875pio_addr=268566528
| 1869int_num=46 1870pio_addr=471793664
|
1876pio_latency=10000 1877pixel_clock=41667 1878system=system 1879vnc=system.vncserver 1880dma=system.iobus.slave[1] 1881pio=system.iobus.master[4] 1882
| 1871pio_latency=10000 1872pixel_clock=41667 1873system=system 1874vnc=system.vncserver 1875dma=system.iobus.slave[1] 1876pio=system.iobus.master[4] 1877
|
1883[system.realview.dmac_fake] 1884type=AmbaFake 1885amba_id=0
| 1878[system.realview.energy_ctrl] 1879type=EnergyCtrl
|
1886clk_domain=system.clk_domain
| 1880clk_domain=system.clk_domain
|
| 1881dvfs_handler=system.dvfs_handler
|
1887eventq_index=0
| 1882eventq_index=0
|
1888ignore_access=false 1889pio_addr=268632064
| 1883pio_addr=470286336
|
1890pio_latency=100000 1891system=system
| 1884pio_latency=100000 1885system=system
|
1892pio=system.iobus.master[9]
| 1886pio=system.iobus.master[22]
|
1893
| 1887
|
1894[system.realview.energy_ctrl] 1895type=EnergyCtrl
| 1888[system.realview.ethernet] 1889type=IGbE 1890BAR0=0 1891BAR0LegacyIO=false 1892BAR0Size=131072 1893BAR1=0 1894BAR1LegacyIO=false 1895BAR1Size=0 1896BAR2=0 1897BAR2LegacyIO=false 1898BAR2Size=0 1899BAR3=0 1900BAR3LegacyIO=false 1901BAR3Size=0 1902BAR4=0 1903BAR4LegacyIO=false 1904BAR4Size=0 1905BAR5=0 1906BAR5LegacyIO=false 1907BAR5Size=0 1908BIST=0 1909CacheLineSize=0 1910CapabilityPtr=0 1911CardbusCIS=0 1912ClassCode=2 1913Command=0 1914DeviceID=4213 1915ExpansionROM=0 1916HeaderType=0 1917InterruptLine=1 1918InterruptPin=1 1919LatencyTimer=0 1920LegacyIOBase=0 1921MSICAPBaseOffset=0 1922MSICAPCapId=0 1923MSICAPMaskBits=0 1924MSICAPMsgAddr=0 1925MSICAPMsgCtrl=0 1926MSICAPMsgData=0 1927MSICAPMsgUpperAddr=0 1928MSICAPNextCapability=0 1929MSICAPPendingBits=0 1930MSIXCAPBaseOffset=0 1931MSIXCAPCapId=0 1932MSIXCAPNextCapability=0 1933MSIXMsgCtrl=0 1934MSIXPbaOffset=0 1935MSIXTableOffset=0 1936MaximumLatency=0 1937MinimumGrant=255 1938PMCAPBaseOffset=0 1939PMCAPCapId=0 1940PMCAPCapabilities=0 1941PMCAPCtrlStatus=0 1942PMCAPNextCapability=0 1943PXCAPBaseOffset=0 1944PXCAPCapId=0 1945PXCAPCapabilities=0 1946PXCAPDevCap2=0 1947PXCAPDevCapabilities=0 1948PXCAPDevCtrl=0 1949PXCAPDevCtrl2=0 1950PXCAPDevStatus=0 1951PXCAPLinkCap=0 1952PXCAPLinkCtrl=0 1953PXCAPLinkStatus=0 1954PXCAPNextCapability=0 1955ProgIF=0 1956Revision=0 1957Status=0 1958SubClassCode=0 1959SubsystemID=4104 1960SubsystemVendorID=32902 1961VendorID=32902
|
1896clk_domain=system.clk_domain
| 1962clk_domain=system.clk_domain
|
1897dvfs_handler=system.dvfs_handler
| 1963config_latency=20000
|
1898eventq_index=0
| 1964eventq_index=0
|
1899pio_addr=268496896 1900pio_latency=100000
| 1965fetch_comp_delay=10000 1966fetch_delay=10000 1967hardware_address=00:90:00:00:00:01 1968pci_bus=0 1969pci_dev=0 1970pci_func=0 1971phy_epid=896 1972phy_pid=680 1973pio_latency=30000 1974platform=system.realview 1975rx_desc_cache_size=64 1976rx_fifo_size=393216 1977rx_write_delay=0
|
1901system=system
| 1978system=system
|
| 1979tx_desc_cache_size=64 1980tx_fifo_size=393216 1981tx_read_delay=0 1982wb_comp_delay=10000 1983wb_delay=10000 1984config=system.iobus.master[26] 1985dma=system.iobus.slave[4]
|
1902pio=system.iobus.master[25] 1903
| 1986pio=system.iobus.master[25] 1987
|
1904[system.realview.flash_fake] 1905type=IsaFake 1906clk_domain=system.clk_domain
| 1988[system.realview.generic_timer] 1989type=GenericTimer
|
1907eventq_index=0
| 1990eventq_index=0
|
1908fake_mem=true 1909pio_addr=1073741824 1910pio_latency=100000 1911pio_size=536870912 1912ret_bad_addr=false 1913ret_data16=65535 1914ret_data32=4294967295 1915ret_data64=18446744073709551615 1916ret_data8=255
| 1991gic=system.realview.gic 1992int_num=29
|
1917system=system
| 1993system=system
|
1918update_data=false 1919warn_access= 1920pio=system.iobus.master[24]
| |
1921 1922[system.realview.gic] 1923type=Pl390 1924clk_domain=system.clk_domain
| 1994 1995[system.realview.gic] 1996type=Pl390 1997clk_domain=system.clk_domain
|
1925cpu_addr=520093952
| 1998cpu_addr=738205696
|
1926cpu_pio_delay=10000
| 1999cpu_pio_delay=10000
|
1927dist_addr=520097792
| 2000dist_addr=738201600
|
1928dist_pio_delay=10000 1929eventq_index=0 1930int_latency=10000 1931it_lines=128 1932msix_addr=0 1933platform=system.realview 1934system=system 1935pio=system.membus.master[2] 1936
| 2001dist_pio_delay=10000 2002eventq_index=0 2003int_latency=10000 2004it_lines=128 2005msix_addr=0 2006platform=system.realview 2007system=system 2008pio=system.membus.master[2] 2009
|
1937[system.realview.gpio0_fake] 1938type=AmbaFake 1939amba_id=0
| 2010[system.realview.hdlcd] 2011type=HDLcd 2012amba_id=1314816
|
1940clk_domain=system.clk_domain
| 2013clk_domain=system.clk_domain
|
| 2014enable_capture=true
|
1941eventq_index=0
| 2015eventq_index=0
|
1942ignore_access=false 1943pio_addr=268513280 1944pio_latency=100000
| 2016gic=system.realview.gic 2017int_num=117 2018pio_addr=721420288 2019pio_latency=10000 2020pixel_clock=7299
|
1945system=system
| 2021system=system
|
1946pio=system.iobus.master[16]
| 2022vnc=system.vncserver 2023dma=system.membus.slave[0] 2024pio=system.iobus.master[5]
|
1947
| 2025
|
1948[system.realview.gpio1_fake] 1949type=AmbaFake 1950amba_id=0
| 2026[system.realview.ide] 2027type=IdeController 2028BAR0=1 2029BAR0LegacyIO=false 2030BAR0Size=8 2031BAR1=1 2032BAR1LegacyIO=false 2033BAR1Size=4 2034BAR2=1 2035BAR2LegacyIO=false 2036BAR2Size=8 2037BAR3=1 2038BAR3LegacyIO=false 2039BAR3Size=4 2040BAR4=1 2041BAR4LegacyIO=false 2042BAR4Size=16 2043BAR5=1 2044BAR5LegacyIO=false 2045BAR5Size=0 2046BIST=0 2047CacheLineSize=0 2048CapabilityPtr=0 2049CardbusCIS=0 2050ClassCode=1 2051Command=0 2052DeviceID=28945 2053ExpansionROM=0 2054HeaderType=0 2055InterruptLine=2 2056InterruptPin=2 2057LatencyTimer=0 2058LegacyIOBase=0 2059MSICAPBaseOffset=0 2060MSICAPCapId=0 2061MSICAPMaskBits=0 2062MSICAPMsgAddr=0 2063MSICAPMsgCtrl=0 2064MSICAPMsgData=0 2065MSICAPMsgUpperAddr=0 2066MSICAPNextCapability=0 2067MSICAPPendingBits=0 2068MSIXCAPBaseOffset=0 2069MSIXCAPCapId=0 2070MSIXCAPNextCapability=0 2071MSIXMsgCtrl=0 2072MSIXPbaOffset=0 2073MSIXTableOffset=0 2074MaximumLatency=0 2075MinimumGrant=0 2076PMCAPBaseOffset=0 2077PMCAPCapId=0 2078PMCAPCapabilities=0 2079PMCAPCtrlStatus=0 2080PMCAPNextCapability=0 2081PXCAPBaseOffset=0 2082PXCAPCapId=0 2083PXCAPCapabilities=0 2084PXCAPDevCap2=0 2085PXCAPDevCapabilities=0 2086PXCAPDevCtrl=0 2087PXCAPDevCtrl2=0 2088PXCAPDevStatus=0 2089PXCAPLinkCap=0 2090PXCAPLinkCtrl=0 2091PXCAPLinkStatus=0 2092PXCAPNextCapability=0 2093ProgIF=133 2094Revision=0 2095Status=640 2096SubClassCode=1 2097SubsystemID=0 2098SubsystemVendorID=0 2099VendorID=32902
|
1951clk_domain=system.clk_domain
| 2100clk_domain=system.clk_domain
|
| 2101config_latency=20000 2102ctrl_offset=0 2103disks=system.cf0
|
1952eventq_index=0
| 2104eventq_index=0
|
1953ignore_access=false 1954pio_addr=268517376 1955pio_latency=100000
| 2105io_shift=0 2106pci_bus=0 2107pci_dev=1 2108pci_func=0 2109pio_latency=30000 2110platform=system.realview
|
1956system=system
| 2111system=system
|
1957pio=system.iobus.master[17]
| 2112config=system.iobus.master[24] 2113dma=system.iobus.slave[3] 2114pio=system.iobus.master[23]
|
1958
| 2115
|
1959[system.realview.gpio2_fake] 1960type=AmbaFake 1961amba_id=0 1962clk_domain=system.clk_domain 1963eventq_index=0 1964ignore_access=false 1965pio_addr=268521472 1966pio_latency=100000 1967system=system 1968pio=system.iobus.master[18] 1969
| |
1970[system.realview.kmi0] 1971type=Pl050 1972amba_id=1314896 1973clk_domain=system.clk_domain 1974eventq_index=0 1975gic=system.realview.gic 1976int_delay=1000000
| 2116[system.realview.kmi0] 2117type=Pl050 2118amba_id=1314896 2119clk_domain=system.clk_domain 2120eventq_index=0 2121gic=system.realview.gic 2122int_delay=1000000
|
1977int_num=52
| 2123int_num=44
|
1978is_mouse=false
| 2124is_mouse=false
|
1979pio_addr=268460032
| 2125pio_addr=470155264
|
1980pio_latency=100000 1981system=system 1982vnc=system.vncserver
| 2126pio_latency=100000 2127system=system 2128vnc=system.vncserver
|
1983pio=system.iobus.master[5]
| 2129pio=system.iobus.master[6]
|
1984 1985[system.realview.kmi1] 1986type=Pl050 1987amba_id=1314896 1988clk_domain=system.clk_domain 1989eventq_index=0 1990gic=system.realview.gic 1991int_delay=1000000
| 2130 2131[system.realview.kmi1] 2132type=Pl050 2133amba_id=1314896 2134clk_domain=system.clk_domain 2135eventq_index=0 2136gic=system.realview.gic 2137int_delay=1000000
|
1992int_num=53
| 2138int_num=45
|
1993is_mouse=true
| 2139is_mouse=true
|
1994pio_addr=268464128
| 2140pio_addr=470220800
|
1995pio_latency=100000 1996system=system 1997vnc=system.vncserver
| 2141pio_latency=100000 2142system=system 2143vnc=system.vncserver
|
1998pio=system.iobus.master[6]
| 2144pio=system.iobus.master[7]
|
1999 2000[system.realview.l2x0_fake] 2001type=IsaFake 2002clk_domain=system.clk_domain 2003eventq_index=0 2004fake_mem=false
| 2145 2146[system.realview.l2x0_fake] 2147type=IsaFake 2148clk_domain=system.clk_domain 2149eventq_index=0 2150fake_mem=false
|
2005pio_addr=520101888
| 2151pio_addr=739246080
|
2006pio_latency=100000 2007pio_size=4095 2008ret_bad_addr=false 2009ret_data16=65535 2010ret_data32=4294967295 2011ret_data64=18446744073709551615 2012ret_data8=255 2013system=system 2014update_data=false 2015warn_access=
| 2152pio_latency=100000 2153pio_size=4095 2154ret_bad_addr=false 2155ret_data16=65535 2156ret_data32=4294967295 2157ret_data64=18446744073709551615 2158ret_data8=255 2159system=system 2160update_data=false 2161warn_access=
|
2016pio=system.membus.master[3]
| 2162pio=system.iobus.master[12]
|
2017
| 2163
|
| 2164[system.realview.lan_fake] 2165type=IsaFake 2166clk_domain=system.clk_domain 2167eventq_index=0 2168fake_mem=false 2169pio_addr=436207616 2170pio_latency=100000 2171pio_size=65535 2172ret_bad_addr=false 2173ret_data16=65535 2174ret_data32=4294967295 2175ret_data64=18446744073709551615 2176ret_data8=255 2177system=system 2178update_data=false 2179warn_access= 2180pio=system.iobus.master[19] 2181
|
2018[system.realview.local_cpu_timer] 2019type=CpuLocalTimer 2020clk_domain=system.clk_domain 2021eventq_index=0 2022gic=system.realview.gic 2023int_num_timer=29 2024int_num_watchdog=30
| 2182[system.realview.local_cpu_timer] 2183type=CpuLocalTimer 2184clk_domain=system.clk_domain 2185eventq_index=0 2186gic=system.realview.gic 2187int_num_timer=29 2188int_num_watchdog=30
|
2025pio_addr=520095232
| 2189pio_addr=738721792
|
2026pio_latency=100000 2027system=system
| 2190pio_latency=100000 2191system=system
|
2028pio=system.membus.master[5]
| 2192pio=system.membus.master[3]
|
2029 2030[system.realview.mmc_fake] 2031type=AmbaFake 2032amba_id=0 2033clk_domain=system.clk_domain 2034eventq_index=0 2035ignore_access=false
| 2193 2194[system.realview.mmc_fake] 2195type=AmbaFake 2196amba_id=0 2197clk_domain=system.clk_domain 2198eventq_index=0 2199ignore_access=false
|
2036pio_addr=268455936
| 2200pio_addr=470089728
|
2037pio_latency=100000 2038system=system
| 2201pio_latency=100000 2202system=system
|
2039pio=system.iobus.master[22]
| 2203pio=system.iobus.master[21]
|
2040 2041[system.realview.nvmem] 2042type=SimpleMemory 2043bandwidth=73.000000 2044clk_domain=system.clk_domain 2045conf_table_reported=false 2046eventq_index=0 2047in_addr_map=true 2048latency=30000 2049latency_var=0 2050null=false
| 2204 2205[system.realview.nvmem] 2206type=SimpleMemory 2207bandwidth=73.000000 2208clk_domain=system.clk_domain 2209conf_table_reported=false 2210eventq_index=0 2211in_addr_map=true 2212latency=30000 2213latency_var=0 2214null=false
|
2051range=2147483648:2214592511
| 2215range=0:67108863
|
2052port=system.membus.master[1] 2053
| 2216port=system.membus.master[1] 2217
|
| 2218[system.realview.pciconfig] 2219type=PciConfigAll 2220bus=0 2221clk_domain=system.clk_domain 2222eventq_index=0 2223pio_addr=0 2224pio_latency=30000 2225platform=system.realview 2226size=268435456 2227system=system 2228pio=system.iobus.default 2229
|
2054[system.realview.realview_io] 2055type=RealViewCtrl 2056clk_domain=system.clk_domain 2057eventq_index=0
| 2230[system.realview.realview_io] 2231type=RealViewCtrl 2232clk_domain=system.clk_domain 2233eventq_index=0
|
2058idreg=0 2059pio_addr=268435456
| 2234idreg=35979264 2235pio_addr=469827584
|
2060pio_latency=100000
| 2236pio_latency=100000
|
2061proc_id0=201326592 2062proc_id1=201327138
| 2237proc_id0=335544320 2238proc_id1=335544320
|
2063system=system 2064pio=system.iobus.master[1] 2065 2066[system.realview.rtc] 2067type=PL031 2068amba_id=3412017 2069clk_domain=system.clk_domain 2070eventq_index=0 2071gic=system.realview.gic 2072int_delay=100000
| 2239system=system 2240pio=system.iobus.master[1] 2241 2242[system.realview.rtc] 2243type=PL031 2244amba_id=3412017 2245clk_domain=system.clk_domain 2246eventq_index=0 2247gic=system.realview.gic 2248int_delay=100000
|
2073int_num=42 2074pio_addr=268529664
| 2249int_num=36 2250pio_addr=471269376
|
2075pio_latency=100000 2076system=system 2077time=Thu Jan 1 00:00:00 2009
| 2251pio_latency=100000 2252system=system 2253time=Thu Jan 1 00:00:00 2009
|
2078pio=system.iobus.master[23]
| 2254pio=system.iobus.master[10]
|
2079
| 2255
|
2080[system.realview.sci_fake] 2081type=AmbaFake 2082amba_id=0 2083clk_domain=system.clk_domain 2084eventq_index=0 2085ignore_access=false 2086pio_addr=268492800 2087pio_latency=100000 2088system=system 2089pio=system.iobus.master[20] 2090 2091[system.realview.smc_fake] 2092type=AmbaFake 2093amba_id=0 2094clk_domain=system.clk_domain 2095eventq_index=0 2096ignore_access=false 2097pio_addr=269357056 2098pio_latency=100000 2099system=system 2100pio=system.iobus.master[13] 2101
| |
2102[system.realview.sp810_fake] 2103type=AmbaFake 2104amba_id=0 2105clk_domain=system.clk_domain 2106eventq_index=0 2107ignore_access=true
| 2256[system.realview.sp810_fake] 2257type=AmbaFake 2258amba_id=0 2259clk_domain=system.clk_domain 2260eventq_index=0 2261ignore_access=true
|
2108pio_addr=268439552
| 2262pio_addr=469893120
|
2109pio_latency=100000 2110system=system
| 2263pio_latency=100000 2264system=system
|
2111pio=system.iobus.master[14]
| 2265pio=system.iobus.master[16]
|
2112
| 2266
|
2113[system.realview.ssp_fake] 2114type=AmbaFake 2115amba_id=0 2116clk_domain=system.clk_domain 2117eventq_index=0 2118ignore_access=false 2119pio_addr=268488704 2120pio_latency=100000 2121system=system 2122pio=system.iobus.master[19] 2123
| |
2124[system.realview.timer0] 2125type=Sp804 2126amba_id=1316868 2127clk_domain=system.clk_domain 2128clock0=1000000 2129clock1=1000000 2130eventq_index=0 2131gic=system.realview.gic
| 2267[system.realview.timer0] 2268type=Sp804 2269amba_id=1316868 2270clk_domain=system.clk_domain 2271clock0=1000000 2272clock1=1000000 2273eventq_index=0 2274gic=system.realview.gic
|
2132int_num0=36 2133int_num1=36 2134pio_addr=268505088
| 2275int_num0=34 2276int_num1=34 2277pio_addr=470876160
|
2135pio_latency=100000 2136system=system 2137pio=system.iobus.master[2] 2138 2139[system.realview.timer1] 2140type=Sp804 2141amba_id=1316868 2142clk_domain=system.clk_domain 2143clock0=1000000 2144clock1=1000000 2145eventq_index=0 2146gic=system.realview.gic
| 2278pio_latency=100000 2279system=system 2280pio=system.iobus.master[2] 2281 2282[system.realview.timer1] 2283type=Sp804 2284amba_id=1316868 2285clk_domain=system.clk_domain 2286clock0=1000000 2287clock1=1000000 2288eventq_index=0 2289gic=system.realview.gic
|
2147int_num0=37 2148int_num1=37 2149pio_addr=268509184
| 2290int_num0=35 2291int_num1=35 2292pio_addr=470941696
|
2150pio_latency=100000 2151system=system 2152pio=system.iobus.master[3] 2153 2154[system.realview.uart] 2155type=Pl011 2156clk_domain=system.clk_domain 2157end_on_eot=false 2158eventq_index=0 2159gic=system.realview.gic 2160int_delay=100000
| 2293pio_latency=100000 2294system=system 2295pio=system.iobus.master[3] 2296 2297[system.realview.uart] 2298type=Pl011 2299clk_domain=system.clk_domain 2300end_on_eot=false 2301eventq_index=0 2302gic=system.realview.gic 2303int_delay=100000
|
2161int_num=44 2162pio_addr=268472320
| 2304int_num=37 2305pio_addr=470351872
|
2163pio_latency=100000 2164platform=system.realview 2165system=system 2166terminal=system.terminal 2167pio=system.iobus.master[0] 2168 2169[system.realview.uart1_fake] 2170type=AmbaFake 2171amba_id=0 2172clk_domain=system.clk_domain 2173eventq_index=0 2174ignore_access=false
| 2306pio_latency=100000 2307platform=system.realview 2308system=system 2309terminal=system.terminal 2310pio=system.iobus.master[0] 2311 2312[system.realview.uart1_fake] 2313type=AmbaFake 2314amba_id=0 2315clk_domain=system.clk_domain 2316eventq_index=0 2317ignore_access=false
|
2175pio_addr=268476416
| 2318pio_addr=470417408
|
2176pio_latency=100000 2177system=system
| 2319pio_latency=100000 2320system=system
|
2178pio=system.iobus.master[10]
| 2321pio=system.iobus.master[13]
|
2179 2180[system.realview.uart2_fake] 2181type=AmbaFake 2182amba_id=0 2183clk_domain=system.clk_domain 2184eventq_index=0 2185ignore_access=false
| 2322 2323[system.realview.uart2_fake] 2324type=AmbaFake 2325amba_id=0 2326clk_domain=system.clk_domain 2327eventq_index=0 2328ignore_access=false
|
2186pio_addr=268480512
| 2329pio_addr=470482944
|
2187pio_latency=100000 2188system=system
| 2330pio_latency=100000 2331system=system
|
2189pio=system.iobus.master[11]
| 2332pio=system.iobus.master[14]
|
2190 2191[system.realview.uart3_fake] 2192type=AmbaFake 2193amba_id=0 2194clk_domain=system.clk_domain 2195eventq_index=0 2196ignore_access=false
| 2333 2334[system.realview.uart3_fake] 2335type=AmbaFake 2336amba_id=0 2337clk_domain=system.clk_domain 2338eventq_index=0 2339ignore_access=false
|
2197pio_addr=268484608
| 2340pio_addr=470548480
|
2198pio_latency=100000 2199system=system
| 2341pio_latency=100000 2342system=system
|
2200pio=system.iobus.master[12]
| 2343pio=system.iobus.master[15]
|
2201
| 2344
|
| 2345[system.realview.usb_fake] 2346type=IsaFake 2347clk_domain=system.clk_domain 2348eventq_index=0 2349fake_mem=false 2350pio_addr=452984832 2351pio_latency=100000 2352pio_size=131071 2353ret_bad_addr=false 2354ret_data16=65535 2355ret_data32=4294967295 2356ret_data64=18446744073709551615 2357ret_data8=255 2358system=system 2359update_data=false 2360warn_access= 2361pio=system.iobus.master[20] 2362 2363[system.realview.vgic] 2364type=VGic 2365clk_domain=system.clk_domain 2366eventq_index=0 2367gic=system.realview.gic 2368hv_addr=738213888 2369pio_delay=10000 2370platform=system.realview 2371ppint=25 2372system=system 2373vcpu_addr=738222080 2374pio=system.membus.master[4] 2375 2376[system.realview.vram] 2377type=SimpleMemory 2378bandwidth=73.000000 2379clk_domain=system.clk_domain 2380conf_table_reported=false 2381eventq_index=0 2382in_addr_map=true 2383latency=30000 2384latency_var=0 2385null=false 2386range=402653184:436207615 2387port=system.iobus.master[11] 2388
|
2202[system.realview.watchdog_fake] 2203type=AmbaFake 2204amba_id=0 2205clk_domain=system.clk_domain 2206eventq_index=0 2207ignore_access=false
| 2389[system.realview.watchdog_fake] 2390type=AmbaFake 2391amba_id=0 2392clk_domain=system.clk_domain 2393eventq_index=0 2394ignore_access=false
|
2208pio_addr=268500992
| 2395pio_addr=470745088
|
2209pio_latency=100000 2210system=system
| 2396pio_latency=100000 2397system=system
|
2211pio=system.iobus.master[15]
| 2398pio=system.iobus.master[17]
|
2212 2213[system.terminal] 2214type=Terminal 2215eventq_index=0 2216intr_control=system.intrctrl 2217number=0 2218output=true 2219port=3456 2220 2221[system.toL2Bus] 2222type=CoherentXBar 2223clk_domain=system.cpu_clk_domain 2224eventq_index=0 2225header_cycles=1 2226snoop_filter=Null 2227system=system 2228use_default_range=false 2229width=8 2230master=system.l2c.cpu_side 2231slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2232 2233[system.vncserver] 2234type=VncServer 2235eventq_index=0 2236frame_capture=false 2237number=0 2238port=5900 2239 2240[system.voltage_domain] 2241type=VoltageDomain 2242eventq_index=0 2243voltage=1.000000 2244
| 2399 2400[system.terminal] 2401type=Terminal 2402eventq_index=0 2403intr_control=system.intrctrl 2404number=0 2405output=true 2406port=3456 2407 2408[system.toL2Bus] 2409type=CoherentXBar 2410clk_domain=system.cpu_clk_domain 2411eventq_index=0 2412header_cycles=1 2413snoop_filter=Null 2414system=system 2415use_default_range=false 2416width=8 2417master=system.l2c.cpu_side 2418slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2419 2420[system.vncserver] 2421type=VncServer 2422eventq_index=0 2423frame_capture=false 2424number=0 2425port=5900 2426 2427[system.voltage_domain] 2428type=VoltageDomain 2429eventq_index=0 2430voltage=1.000000 2431
|