1
2---------- Begin Simulation Statistics ----------
3sim_seconds 1.908652 # Number of seconds simulated
4sim_ticks 1908652088000 # Number of ticks simulated
5final_tick 1908652088000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 169428 # Simulator instruction rate (inst/s)
8host_op_rate 169428 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 5757307258 # Simulator tick rate (ticks/s)
10host_mem_usage 336708 # Number of bytes of host memory used
11host_seconds 331.52 # Real time elapsed on the host
12sim_insts 56168509 # Number of instructions simulated
13sim_ops 56168509 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu0.inst 873216 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu0.data 24648192 # Number of bytes read from this memory
18system.physmem.bytes_read::cpu1.inst 103232 # Number of bytes read from this memory
19system.physmem.bytes_read::cpu1.data 582976 # Number of bytes read from this memory
20system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory
21system.physmem.bytes_read::total 26208576 # Number of bytes read from this memory
22system.physmem.bytes_inst_read::cpu0.inst 873216 # Number of instructions bytes read from this memory
23system.physmem.bytes_inst_read::cpu1.inst 103232 # Number of instructions bytes read from this memory
--- 295 unchanged lines hidden (view full) ---
319system.physmem_1.preBackEnergy 1094955297750 # Energy for precharge background per rank (pJ)
320system.physmem_1.totalEnergy 1279280671710 # Total energy per rank (pJ)
321system.physmem_1.averagePower 670.253671 # Core power per rank (mW)
322system.physmem_1.memoryStateTime::IDLE 1821389841500 # Time in different power states
323system.physmem_1.memoryStateTime::REF 63734060000 # Time in different power states
324system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
325system.physmem_1.memoryStateTime::ACT 23527607250 # Time in different power states
326system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
327system.cpu0.branchPred.lookups 18555851 # Number of BP lookups
328system.cpu0.branchPred.condPredicted 15805635 # Number of conditional branches predicted
329system.cpu0.branchPred.condIncorrect 543843 # Number of conditional branches incorrect
330system.cpu0.branchPred.BTBLookups 11677993 # Number of BTB lookups
331system.cpu0.branchPred.BTBHits 5178603 # Number of BTB hits
332system.cpu0.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
333system.cpu0.branchPred.BTBHitPct 44.344974 # BTB Hit Percentage
334system.cpu0.branchPred.usedRAS 1050126 # Number of times the RAS was used to get a target.
--- 30 unchanged lines hidden (view full) ---
365system.cpu0.itb.write_hits 0 # DTB write hits
366system.cpu0.itb.write_misses 0 # DTB write misses
367system.cpu0.itb.write_acv 0 # DTB write access violations
368system.cpu0.itb.write_accesses 0 # DTB write accesses
369system.cpu0.itb.data_hits 0 # DTB hits
370system.cpu0.itb.data_misses 0 # DTB misses
371system.cpu0.itb.data_acv 0 # DTB access violations
372system.cpu0.itb.data_accesses 0 # DTB accesses
373system.cpu0.numCycles 120614537 # number of cpu cycles simulated
374system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
375system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
376system.cpu0.fetch.icacheStallCycles 28910287 # Number of cycles fetch is stalled on an Icache miss
377system.cpu0.fetch.Insts 80847463 # Number of instructions fetch has processed
378system.cpu0.fetch.Branches 18555851 # Number of branches that fetch encountered
379system.cpu0.fetch.predictedBranches 6755950 # Number of branches that fetch has predicted taken
380system.cpu0.fetch.Cycles 84571652 # Number of cycles fetch has run and was not squashing or blocked
--- 279 unchanged lines hidden (view full) ---
660system.cpu0.ipc 0.418179 # IPC: Instructions Per Cycle
661system.cpu0.ipc_total 0.418179 # IPC: Total IPC of All Threads
662system.cpu0.int_regfile_reads 73773620 # number of integer regfile reads
663system.cpu0.int_regfile_writes 40428970 # number of integer regfile writes
664system.cpu0.fp_regfile_reads 142673 # number of floating regfile reads
665system.cpu0.fp_regfile_writes 153221 # number of floating regfile writes
666system.cpu0.misc_regfile_reads 1866400 # number of misc regfile reads
667system.cpu0.misc_regfile_writes 877434 # number of misc regfile writes
668system.cpu0.dcache.tags.replacements 1337856 # number of replacements
669system.cpu0.dcache.tags.tagsinuse 505.906059 # Cycle average of tags in use
670system.cpu0.dcache.tags.total_refs 11855471 # Total number of references to valid blocks.
671system.cpu0.dcache.tags.sampled_refs 1338256 # Sample count of references to valid blocks.
672system.cpu0.dcache.tags.avg_refs 8.858896 # Average number of references to valid blocks.
673system.cpu0.dcache.tags.warmup_cycle 26822500 # Cycle when the warmup percentage was hit.
674system.cpu0.dcache.tags.occ_blocks::cpu0.data 505.906059 # Average occupied blocks per requestor
675system.cpu0.dcache.tags.occ_percent::cpu0.data 0.988098 # Average percentage of cache occupancy
676system.cpu0.dcache.tags.occ_percent::total 0.988098 # Average percentage of cache occupancy
677system.cpu0.dcache.tags.occ_task_id_blocks::1024 400 # Occupied blocks per task id
678system.cpu0.dcache.tags.age_task_id_blocks_1024::2 396 # Occupied blocks per task id
679system.cpu0.dcache.tags.age_task_id_blocks_1024::3 4 # Occupied blocks per task id
680system.cpu0.dcache.tags.occ_task_id_percent::1024 0.781250 # Percentage of cache occupancy per task id
681system.cpu0.dcache.tags.tag_accesses 62973100 # Number of tag accesses
682system.cpu0.dcache.tags.data_accesses 62973100 # Number of data accesses
683system.cpu0.dcache.ReadReq_hits::cpu0.data 7528886 # number of ReadReq hits
684system.cpu0.dcache.ReadReq_hits::total 7528886 # number of ReadReq hits
685system.cpu0.dcache.WriteReq_hits::cpu0.data 3919891 # number of WriteReq hits
686system.cpu0.dcache.WriteReq_hits::total 3919891 # number of WriteReq hits
687system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 201495 # number of LoadLockedReq hits
688system.cpu0.dcache.LoadLockedReq_hits::total 201495 # number of LoadLockedReq hits
689system.cpu0.dcache.StoreCondReq_hits::cpu0.data 204000 # number of StoreCondReq hits
690system.cpu0.dcache.StoreCondReq_hits::total 204000 # number of StoreCondReq hits
--- 136 unchanged lines hidden (view full) ---
827system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu0.data 31944.074624 # average overall mshr miss latency
828system.cpu0.dcache.demand_avg_mshr_miss_latency::total 31944.074624 # average overall mshr miss latency
829system.cpu0.dcache.overall_avg_mshr_miss_latency::cpu0.data 31944.074624 # average overall mshr miss latency
830system.cpu0.dcache.overall_avg_mshr_miss_latency::total 31944.074624 # average overall mshr miss latency
831system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu0.data 222625.620303 # average ReadReq mshr uncacheable latency
832system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total 222625.620303 # average ReadReq mshr uncacheable latency
833system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu0.data 93130.397390 # average overall mshr uncacheable latency
834system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 93130.397390 # average overall mshr uncacheable latency
835system.cpu0.icache.tags.replacements 1021310 # number of replacements
836system.cpu0.icache.tags.tagsinuse 509.519684 # Cycle average of tags in use
837system.cpu0.icache.tags.total_refs 8197716 # Total number of references to valid blocks.
838system.cpu0.icache.tags.sampled_refs 1021822 # Sample count of references to valid blocks.
839system.cpu0.icache.tags.avg_refs 8.022646 # Average number of references to valid blocks.
840system.cpu0.icache.tags.warmup_cycle 28452447500 # Cycle when the warmup percentage was hit.
841system.cpu0.icache.tags.occ_blocks::cpu0.inst 509.519684 # Average occupied blocks per requestor
842system.cpu0.icache.tags.occ_percent::cpu0.inst 0.995156 # Average percentage of cache occupancy
843system.cpu0.icache.tags.occ_percent::total 0.995156 # Average percentage of cache occupancy
844system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
845system.cpu0.icache.tags.age_task_id_blocks_1024::2 492 # Occupied blocks per task id
846system.cpu0.icache.tags.age_task_id_blocks_1024::3 20 # Occupied blocks per task id
847system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
848system.cpu0.icache.tags.tag_accesses 10303980 # Number of tag accesses
849system.cpu0.icache.tags.data_accesses 10303980 # Number of data accesses
850system.cpu0.icache.ReadReq_hits::cpu0.inst 8197716 # number of ReadReq hits
851system.cpu0.icache.ReadReq_hits::total 8197716 # number of ReadReq hits
852system.cpu0.icache.demand_hits::cpu0.inst 8197716 # number of demand (read+write) hits
853system.cpu0.icache.demand_hits::total 8197716 # number of demand (read+write) hits
854system.cpu0.icache.overall_hits::cpu0.inst 8197716 # number of overall hits
855system.cpu0.icache.overall_hits::total 8197716 # number of overall hits
856system.cpu0.icache.ReadReq_misses::cpu0.inst 1084226 # number of ReadReq misses
857system.cpu0.icache.ReadReq_misses::total 1084226 # number of ReadReq misses
--- 103 unchanged lines hidden (view full) ---
961system.cpu1.itb.write_hits 0 # DTB write hits
962system.cpu1.itb.write_misses 0 # DTB write misses
963system.cpu1.itb.write_acv 0 # DTB write access violations
964system.cpu1.itb.write_accesses 0 # DTB write accesses
965system.cpu1.itb.data_hits 0 # DTB hits
966system.cpu1.itb.data_misses 0 # DTB misses
967system.cpu1.itb.data_acv 0 # DTB access violations
968system.cpu1.itb.data_accesses 0 # DTB accesses
969system.cpu1.numCycles 10299543 # number of cpu cycles simulated
970system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
971system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
972system.cpu1.fetch.icacheStallCycles 3708105 # Number of cycles fetch is stalled on an Icache miss
973system.cpu1.fetch.Insts 10416725 # Number of instructions fetch has processed
974system.cpu1.fetch.Branches 2642221 # Number of branches that fetch encountered
975system.cpu1.fetch.predictedBranches 708563 # Number of branches that fetch has predicted taken
976system.cpu1.fetch.Cycles 5867887 # Number of cycles fetch has run and was not squashing or blocked
--- 278 unchanged lines hidden (view full) ---
1255system.cpu1.ipc 0.556337 # IPC: Instructions Per Cycle
1256system.cpu1.ipc_total 0.556337 # IPC: Total IPC of All Threads
1257system.cpu1.int_regfile_reads 8470716 # number of integer regfile reads
1258system.cpu1.int_regfile_writes 4619691 # number of integer regfile writes
1259system.cpu1.fp_regfile_reads 26922 # number of floating regfile reads
1260system.cpu1.fp_regfile_writes 25344 # number of floating regfile writes
1261system.cpu1.misc_regfile_reads 302216 # number of misc regfile reads
1262system.cpu1.misc_regfile_writes 137559 # number of misc regfile writes
1263system.cpu1.dcache.tags.replacements 64410 # number of replacements
1264system.cpu1.dcache.tags.tagsinuse 463.614906 # Cycle average of tags in use
1265system.cpu1.dcache.tags.total_refs 1794834 # Total number of references to valid blocks.
1266system.cpu1.dcache.tags.sampled_refs 64922 # Sample count of references to valid blocks.
1267system.cpu1.dcache.tags.avg_refs 27.646006 # Average number of references to valid blocks.
1268system.cpu1.dcache.tags.warmup_cycle 1880101020500 # Cycle when the warmup percentage was hit.
1269system.cpu1.dcache.tags.occ_blocks::cpu1.data 463.614906 # Average occupied blocks per requestor
1270system.cpu1.dcache.tags.occ_percent::cpu1.data 0.905498 # Average percentage of cache occupancy
1271system.cpu1.dcache.tags.occ_percent::total 0.905498 # Average percentage of cache occupancy
1272system.cpu1.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
1273system.cpu1.dcache.tags.age_task_id_blocks_1024::0 244 # Occupied blocks per task id
1274system.cpu1.dcache.tags.age_task_id_blocks_1024::1 222 # Occupied blocks per task id
1275system.cpu1.dcache.tags.age_task_id_blocks_1024::2 46 # Occupied blocks per task id
1276system.cpu1.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
1277system.cpu1.dcache.tags.tag_accesses 8336582 # Number of tag accesses
1278system.cpu1.dcache.tags.data_accesses 8336582 # Number of data accesses
1279system.cpu1.dcache.ReadReq_hits::cpu1.data 1188882 # number of ReadReq hits
1280system.cpu1.dcache.ReadReq_hits::total 1188882 # number of ReadReq hits
1281system.cpu1.dcache.WriteReq_hits::cpu1.data 570377 # number of WriteReq hits
1282system.cpu1.dcache.WriteReq_hits::total 570377 # number of WriteReq hits
1283system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 16198 # number of LoadLockedReq hits
1284system.cpu1.dcache.LoadLockedReq_hits::total 16198 # number of LoadLockedReq hits
1285system.cpu1.dcache.StoreCondReq_hits::cpu1.data 15147 # number of StoreCondReq hits
1286system.cpu1.dcache.StoreCondReq_hits::total 15147 # number of StoreCondReq hits
--- 144 unchanged lines hidden (view full) ---
1431system.cpu1.dcache.demand_avg_mshr_miss_latency::cpu1.data 24901.649770 # average overall mshr miss latency
1432system.cpu1.dcache.demand_avg_mshr_miss_latency::total 24901.649770 # average overall mshr miss latency
1433system.cpu1.dcache.overall_avg_mshr_miss_latency::cpu1.data 24901.649770 # average overall mshr miss latency
1434system.cpu1.dcache.overall_avg_mshr_miss_latency::total 24901.649770 # average overall mshr miss latency
1435system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 202982.876712 # average ReadReq mshr uncacheable latency
1436system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::total 202982.876712 # average ReadReq mshr uncacheable latency
1437system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data 10855.494505 # average overall mshr uncacheable latency
1438system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::total 10855.494505 # average overall mshr uncacheable latency
1439system.cpu1.icache.tags.replacements 125381 # number of replacements
1440system.cpu1.icache.tags.tagsinuse 466.454678 # Cycle average of tags in use
1441system.cpu1.icache.tags.total_refs 1056750 # Total number of references to valid blocks.
1442system.cpu1.icache.tags.sampled_refs 125892 # Sample count of references to valid blocks.
1443system.cpu1.icache.tags.avg_refs 8.394100 # Average number of references to valid blocks.
1444system.cpu1.icache.tags.warmup_cycle 1880706304500 # Cycle when the warmup percentage was hit.
1445system.cpu1.icache.tags.occ_blocks::cpu1.inst 466.454678 # Average occupied blocks per requestor
1446system.cpu1.icache.tags.occ_percent::cpu1.inst 0.911044 # Average percentage of cache occupancy
1447system.cpu1.icache.tags.occ_percent::total 0.911044 # Average percentage of cache occupancy
1448system.cpu1.icache.tags.occ_task_id_blocks::1024 511 # Occupied blocks per task id
1449system.cpu1.icache.tags.age_task_id_blocks_1024::0 75 # Occupied blocks per task id
1450system.cpu1.icache.tags.age_task_id_blocks_1024::1 23 # Occupied blocks per task id
1451system.cpu1.icache.tags.age_task_id_blocks_1024::2 412 # Occupied blocks per task id
1452system.cpu1.icache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id
1453system.cpu1.icache.tags.occ_task_id_percent::1024 0.998047 # Percentage of cache occupancy per task id
1454system.cpu1.icache.tags.tag_accesses 1315314 # Number of tag accesses
1455system.cpu1.icache.tags.data_accesses 1315314 # Number of data accesses
1456system.cpu1.icache.ReadReq_hits::cpu1.inst 1056751 # number of ReadReq hits
1457system.cpu1.icache.ReadReq_hits::total 1056751 # number of ReadReq hits
1458system.cpu1.icache.demand_hits::cpu1.inst 1056751 # number of demand (read+write) hits
1459system.cpu1.icache.demand_hits::total 1056751 # number of demand (read+write) hits
1460system.cpu1.icache.overall_hits::cpu1.inst 1056751 # number of overall hits
1461system.cpu1.icache.overall_hits::total 1056751 # number of overall hits
1462system.cpu1.icache.ReadReq_misses::cpu1.inst 132616 # number of ReadReq misses
1463system.cpu1.icache.ReadReq_misses::total 132616 # number of ReadReq misses
--- 70 unchanged lines hidden (view full) ---
1534system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes.
1535system.disk0.dma_write_txs 395 # Number of DMA write transactions.
1536system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
1537system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
1538system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
1539system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
1540system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
1541system.disk2.dma_write_txs 1 # Number of DMA write transactions.
1542system.iobus.trans_dist::ReadReq 7381 # Transaction distribution
1543system.iobus.trans_dist::ReadResp 7381 # Transaction distribution
1544system.iobus.trans_dist::WriteReq 53943 # Transaction distribution
1545system.iobus.trans_dist::WriteResp 53943 # Transaction distribution
1546system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 10586 # Packet count per connected master and slave (bytes)
1547system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1002 # Packet count per connected master and slave (bytes)
1548system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes)
1549system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes)
--- 38 unchanged lines hidden (view full) ---
1588system.iobus.reqLayer26.occupancy 93000 # Layer occupancy (ticks)
1589system.iobus.reqLayer26.utilization 0.0 # Layer utilization (%)
1590system.iobus.reqLayer27.occupancy 216209541 # Layer occupancy (ticks)
1591system.iobus.reqLayer27.utilization 0.0 # Layer utilization (%)
1592system.iobus.respLayer0.occupancy 26789000 # Layer occupancy (ticks)
1593system.iobus.respLayer0.utilization 0.0 # Layer utilization (%)
1594system.iobus.respLayer1.occupancy 41964000 # Layer occupancy (ticks)
1595system.iobus.respLayer1.utilization 0.0 # Layer utilization (%)
1596system.iocache.tags.replacements 41702 # number of replacements
1597system.iocache.tags.tagsinuse 0.516326 # Cycle average of tags in use
1598system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
1599system.iocache.tags.sampled_refs 41718 # Sample count of references to valid blocks.
1600system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
1601system.iocache.tags.warmup_cycle 1712300449000 # Cycle when the warmup percentage was hit.
1602system.iocache.tags.occ_blocks::tsunami.ide 0.516326 # Average occupied blocks per requestor
1603system.iocache.tags.occ_percent::tsunami.ide 0.032270 # Average percentage of cache occupancy
1604system.iocache.tags.occ_percent::total 0.032270 # Average percentage of cache occupancy
1605system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id
1606system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id
1607system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
1608system.iocache.tags.tag_accesses 375606 # Number of tag accesses
1609system.iocache.tags.data_accesses 375606 # Number of data accesses
1610system.iocache.ReadReq_misses::tsunami.ide 182 # number of ReadReq misses
1611system.iocache.ReadReq_misses::total 182 # number of ReadReq misses
1612system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses
1613system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses
1614system.iocache.demand_misses::tsunami.ide 41734 # number of demand (read+write) misses
1615system.iocache.demand_misses::total 41734 # number of demand (read+write) misses
1616system.iocache.overall_misses::tsunami.ide 41734 # number of overall misses
1617system.iocache.overall_misses::total 41734 # number of overall misses
--- 64 unchanged lines hidden (view full) ---
1682system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 75900.456044 # average ReadReq mshr miss latency
1683system.iocache.ReadReq_avg_mshr_miss_latency::total 75900.456044 # average ReadReq mshr miss latency
1684system.iocache.WriteLineReq_avg_mshr_miss_latency::tsunami.ide 66906.368093 # average WriteLineReq mshr miss latency
1685system.iocache.WriteLineReq_avg_mshr_miss_latency::total 66906.368093 # average WriteLineReq mshr miss latency
1686system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 66945.590885 # average overall mshr miss latency
1687system.iocache.demand_avg_mshr_miss_latency::total 66945.590885 # average overall mshr miss latency
1688system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 66945.590885 # average overall mshr miss latency
1689system.iocache.overall_avg_mshr_miss_latency::total 66945.590885 # average overall mshr miss latency
1690system.l2c.tags.replacements 344399 # number of replacements
1691system.l2c.tags.tagsinuse 65257.528904 # Cycle average of tags in use
1692system.l2c.tags.total_refs 4049043 # Total number of references to valid blocks.
1693system.l2c.tags.sampled_refs 409397 # Sample count of references to valid blocks.
1694system.l2c.tags.avg_refs 9.890261 # Average number of references to valid blocks.
1695system.l2c.tags.warmup_cycle 7589084000 # Cycle when the warmup percentage was hit.
1696system.l2c.tags.occ_blocks::writebacks 53234.554738 # Average occupied blocks per requestor
1697system.l2c.tags.occ_blocks::cpu0.inst 5306.808814 # Average occupied blocks per requestor
--- 10 unchanged lines hidden (view full) ---
1708system.l2c.tags.age_task_id_blocks_1024::0 232 # Occupied blocks per task id
1709system.l2c.tags.age_task_id_blocks_1024::1 3509 # Occupied blocks per task id
1710system.l2c.tags.age_task_id_blocks_1024::2 3235 # Occupied blocks per task id
1711system.l2c.tags.age_task_id_blocks_1024::3 6125 # Occupied blocks per task id
1712system.l2c.tags.age_task_id_blocks_1024::4 51897 # Occupied blocks per task id
1713system.l2c.tags.occ_task_id_percent::1024 0.991791 # Percentage of cache occupancy per task id
1714system.l2c.tags.tag_accesses 38854214 # Number of tag accesses
1715system.l2c.tags.data_accesses 38854214 # Number of data accesses
1716system.l2c.WritebackDirty_hits::writebacks 830750 # number of WritebackDirty hits
1717system.l2c.WritebackDirty_hits::total 830750 # number of WritebackDirty hits
1718system.l2c.WritebackClean_hits::writebacks 873391 # number of WritebackClean hits
1719system.l2c.WritebackClean_hits::total 873391 # number of WritebackClean hits
1720system.l2c.UpgradeReq_hits::cpu0.data 189 # number of UpgradeReq hits
1721system.l2c.UpgradeReq_hits::cpu1.data 76 # number of UpgradeReq hits
1722system.l2c.UpgradeReq_hits::total 265 # number of UpgradeReq hits
1723system.l2c.SCUpgradeReq_hits::cpu0.data 96 # number of SCUpgradeReq hits
--- 290 unchanged lines hidden (view full) ---
2014system.l2c.overall_avg_mshr_uncacheable_latency::cpu1.data 10186.996337 # average overall mshr uncacheable latency
2015system.l2c.overall_avg_mshr_uncacheable_latency::total 77070.495151 # average overall mshr uncacheable latency
2016system.membus.snoop_filter.tot_requests 843888 # Total number of requests made to the snoop filter.
2017system.membus.snoop_filter.hit_single_requests 393117 # Number of requests hitting in the snoop filter with a single holder of the requested data.
2018system.membus.snoop_filter.hit_multi_requests 439 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
2019system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
2020system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
2021system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
2022system.membus.trans_dist::ReadReq 7199 # Transaction distribution
2023system.membus.trans_dist::ReadResp 297053 # Transaction distribution
2024system.membus.trans_dist::WriteReq 12391 # Transaction distribution
2025system.membus.trans_dist::WriteResp 12391 # Transaction distribution
2026system.membus.trans_dist::WritebackDirty 122655 # Transaction distribution
2027system.membus.trans_dist::CleanEvict 262560 # Transaction distribution
2028system.membus.trans_dist::UpgradeReq 5361 # Transaction distribution
2029system.membus.trans_dist::SCUpgradeReq 1592 # Transaction distribution
--- 33 unchanged lines hidden (view full) ---
2063system.membus.reqLayer1.occupancy 1351079796 # Layer occupancy (ticks)
2064system.membus.reqLayer1.utilization 0.1 # Layer utilization (%)
2065system.membus.reqLayer2.occupancy 60000 # Layer occupancy (ticks)
2066system.membus.reqLayer2.utilization 0.0 # Layer utilization (%)
2067system.membus.respLayer1.occupancy 2171993250 # Layer occupancy (ticks)
2068system.membus.respLayer1.utilization 0.1 # Layer utilization (%)
2069system.membus.respLayer2.occupancy 976613 # Layer occupancy (ticks)
2070system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
2071system.toL2Bus.snoop_filter.tot_requests 5115302 # Total number of requests made to the snoop filter.
2072system.toL2Bus.snoop_filter.hit_single_requests 2557070 # Number of requests hitting in the snoop filter with a single holder of the requested data.
2073system.toL2Bus.snoop_filter.hit_multi_requests 337938 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
2074system.toL2Bus.snoop_filter.tot_snoops 1067 # Total number of snoops made to the snoop filter.
2075system.toL2Bus.snoop_filter.hit_single_snoops 999 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
2076system.toL2Bus.snoop_filter.hit_multi_snoops 68 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
2077system.toL2Bus.trans_dist::ReadReq 7199 # Transaction distribution
2078system.toL2Bus.trans_dist::ReadResp 2263337 # Transaction distribution
2079system.toL2Bus.trans_dist::WriteReq 12391 # Transaction distribution
2080system.toL2Bus.trans_dist::WriteResp 12391 # Transaction distribution
2081system.toL2Bus.trans_dist::WritebackDirty 911885 # Transaction distribution
2082system.toL2Bus.trans_dist::WritebackClean 1146691 # Transaction distribution
2083system.toL2Bus.trans_dist::CleanEvict 834780 # Transaction distribution
2084system.toL2Bus.trans_dist::UpgradeReq 5446 # Transaction distribution
--- 38 unchanged lines hidden (view full) ---
2123system.toL2Bus.respLayer0.occupancy 1534824957 # Layer occupancy (ticks)
2124system.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%)
2125system.toL2Bus.respLayer1.occupancy 2028150819 # Layer occupancy (ticks)
2126system.toL2Bus.respLayer1.utilization 0.1 # Layer utilization (%)
2127system.toL2Bus.respLayer2.occupancy 190444943 # Layer occupancy (ticks)
2128system.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%)
2129system.toL2Bus.respLayer3.occupancy 107558787 # Layer occupancy (ticks)
2130system.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%)
2131system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
2132system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
2133system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
2134system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
2135system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
2136system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post
2137system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
2138system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
--- 15 unchanged lines hidden (view full) ---
2154system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post
2155system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
2156system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
2157system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post
2158system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
2159system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
2160system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
2161system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
2162system.cpu0.kern.inst.arm 0 # number of arm instructions executed
2163system.cpu0.kern.inst.quiesce 6376 # number of quiesce instructions executed
2164system.cpu0.kern.inst.hwrei 198541 # number of hwrei instructions executed
2165system.cpu0.kern.ipl_count::0 71138 40.62% 40.62% # number of times we switched to this ipl
2166system.cpu0.kern.ipl_count::21 133 0.08% 40.69% # number of times we switched to this ipl
2167system.cpu0.kern.ipl_count::22 1928 1.10% 41.79% # number of times we switched to this ipl
2168system.cpu0.kern.ipl_count::30 20 0.01% 41.80% # number of times we switched to this ipl
2169system.cpu0.kern.ipl_count::31 101928 58.20% 100.00% # number of times we switched to this ipl
--- 151 unchanged lines hidden ---
2---------- Begin Simulation Statistics ----------
3sim_seconds 1.908652 # Number of seconds simulated
4sim_ticks 1908652088000 # Number of ticks simulated
5final_tick 1908652088000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 169428 # Simulator instruction rate (inst/s)
8host_op_rate 169428 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 5757307258 # Simulator tick rate (ticks/s)
10host_mem_usage 336708 # Number of bytes of host memory used
11host_seconds 331.52 # Real time elapsed on the host
12sim_insts 56168509 # Number of instructions simulated
13sim_ops 56168509 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu0.inst 873216 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu0.data 24648192 # Number of bytes read from this memory
18system.physmem.bytes_read::cpu1.inst 103232 # Number of bytes read from this memory
19system.physmem.bytes_read::cpu1.data 582976 # Number of bytes read from this memory
20system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory
21system.physmem.bytes_read::total 26208576 # Number of bytes read from this memory
22system.physmem.bytes_inst_read::cpu0.inst 873216 # Number of instructions bytes read from this memory
23system.physmem.bytes_inst_read::cpu1.inst 103232 # Number of instructions bytes read from this memory
--- 295 unchanged lines hidden (view full) ---
319system.physmem_1.preBackEnergy 1094955297750 # Energy for precharge background per rank (pJ)
320system.physmem_1.totalEnergy 1279280671710 # Total energy per rank (pJ)
321system.physmem_1.averagePower 670.253671 # Core power per rank (mW)
322system.physmem_1.memoryStateTime::IDLE 1821389841500 # Time in different power states
323system.physmem_1.memoryStateTime::REF 63734060000 # Time in different power states
324system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
325system.physmem_1.memoryStateTime::ACT 23527607250 # Time in different power states
326system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
327system.cpu0.branchPred.lookups 18555851 # Number of BP lookups
328system.cpu0.branchPred.condPredicted 15805635 # Number of conditional branches predicted
329system.cpu0.branchPred.condIncorrect 543843 # Number of conditional branches incorrect
330system.cpu0.branchPred.BTBLookups 11677993 # Number of BTB lookups
331system.cpu0.branchPred.BTBHits 5178603 # Number of BTB hits
332system.cpu0.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
333system.cpu0.branchPred.BTBHitPct 44.344974 # BTB Hit Percentage
334system.cpu0.branchPred.usedRAS 1050126 # Number of times the RAS was used to get a target.
--- 30 unchanged lines hidden (view full) ---
365system.cpu0.itb.write_hits 0 # DTB write hits
366system.cpu0.itb.write_misses 0 # DTB write misses
367system.cpu0.itb.write_acv 0 # DTB write access violations
368system.cpu0.itb.write_accesses 0 # DTB write accesses
369system.cpu0.itb.data_hits 0 # DTB hits
370system.cpu0.itb.data_misses 0 # DTB misses
371system.cpu0.itb.data_acv 0 # DTB access violations
372system.cpu0.itb.data_accesses 0 # DTB accesses
373system.cpu0.numCycles 120614537 # number of cpu cycles simulated
374system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
375system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
376system.cpu0.fetch.icacheStallCycles 28910287 # Number of cycles fetch is stalled on an Icache miss
377system.cpu0.fetch.Insts 80847463 # Number of instructions fetch has processed
378system.cpu0.fetch.Branches 18555851 # Number of branches that fetch encountered
379system.cpu0.fetch.predictedBranches 6755950 # Number of branches that fetch has predicted taken
380system.cpu0.fetch.Cycles 84571652 # Number of cycles fetch has run and was not squashing or blocked
--- 279 unchanged lines hidden (view full) ---
660system.cpu0.ipc 0.418179 # IPC: Instructions Per Cycle
661system.cpu0.ipc_total 0.418179 # IPC: Total IPC of All Threads
662system.cpu0.int_regfile_reads 73773620 # number of integer regfile reads
663system.cpu0.int_regfile_writes 40428970 # number of integer regfile writes
664system.cpu0.fp_regfile_reads 142673 # number of floating regfile reads
665system.cpu0.fp_regfile_writes 153221 # number of floating regfile writes
666system.cpu0.misc_regfile_reads 1866400 # number of misc regfile reads
667system.cpu0.misc_regfile_writes 877434 # number of misc regfile writes
668system.cpu0.dcache.tags.replacements 1337856 # number of replacements
669system.cpu0.dcache.tags.tagsinuse 505.906059 # Cycle average of tags in use
670system.cpu0.dcache.tags.total_refs 11855471 # Total number of references to valid blocks.
671system.cpu0.dcache.tags.sampled_refs 1338256 # Sample count of references to valid blocks.
672system.cpu0.dcache.tags.avg_refs 8.858896 # Average number of references to valid blocks.
673system.cpu0.dcache.tags.warmup_cycle 26822500 # Cycle when the warmup percentage was hit.
674system.cpu0.dcache.tags.occ_blocks::cpu0.data 505.906059 # Average occupied blocks per requestor
675system.cpu0.dcache.tags.occ_percent::cpu0.data 0.988098 # Average percentage of cache occupancy
676system.cpu0.dcache.tags.occ_percent::total 0.988098 # Average percentage of cache occupancy
677system.cpu0.dcache.tags.occ_task_id_blocks::1024 400 # Occupied blocks per task id
678system.cpu0.dcache.tags.age_task_id_blocks_1024::2 396 # Occupied blocks per task id
679system.cpu0.dcache.tags.age_task_id_blocks_1024::3 4 # Occupied blocks per task id
680system.cpu0.dcache.tags.occ_task_id_percent::1024 0.781250 # Percentage of cache occupancy per task id
681system.cpu0.dcache.tags.tag_accesses 62973100 # Number of tag accesses
682system.cpu0.dcache.tags.data_accesses 62973100 # Number of data accesses
683system.cpu0.dcache.ReadReq_hits::cpu0.data 7528886 # number of ReadReq hits
684system.cpu0.dcache.ReadReq_hits::total 7528886 # number of ReadReq hits
685system.cpu0.dcache.WriteReq_hits::cpu0.data 3919891 # number of WriteReq hits
686system.cpu0.dcache.WriteReq_hits::total 3919891 # number of WriteReq hits
687system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 201495 # number of LoadLockedReq hits
688system.cpu0.dcache.LoadLockedReq_hits::total 201495 # number of LoadLockedReq hits
689system.cpu0.dcache.StoreCondReq_hits::cpu0.data 204000 # number of StoreCondReq hits
690system.cpu0.dcache.StoreCondReq_hits::total 204000 # number of StoreCondReq hits
--- 136 unchanged lines hidden (view full) ---
827system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu0.data 31944.074624 # average overall mshr miss latency
828system.cpu0.dcache.demand_avg_mshr_miss_latency::total 31944.074624 # average overall mshr miss latency
829system.cpu0.dcache.overall_avg_mshr_miss_latency::cpu0.data 31944.074624 # average overall mshr miss latency
830system.cpu0.dcache.overall_avg_mshr_miss_latency::total 31944.074624 # average overall mshr miss latency
831system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu0.data 222625.620303 # average ReadReq mshr uncacheable latency
832system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total 222625.620303 # average ReadReq mshr uncacheable latency
833system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu0.data 93130.397390 # average overall mshr uncacheable latency
834system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 93130.397390 # average overall mshr uncacheable latency
835system.cpu0.icache.tags.replacements 1021310 # number of replacements
836system.cpu0.icache.tags.tagsinuse 509.519684 # Cycle average of tags in use
837system.cpu0.icache.tags.total_refs 8197716 # Total number of references to valid blocks.
838system.cpu0.icache.tags.sampled_refs 1021822 # Sample count of references to valid blocks.
839system.cpu0.icache.tags.avg_refs 8.022646 # Average number of references to valid blocks.
840system.cpu0.icache.tags.warmup_cycle 28452447500 # Cycle when the warmup percentage was hit.
841system.cpu0.icache.tags.occ_blocks::cpu0.inst 509.519684 # Average occupied blocks per requestor
842system.cpu0.icache.tags.occ_percent::cpu0.inst 0.995156 # Average percentage of cache occupancy
843system.cpu0.icache.tags.occ_percent::total 0.995156 # Average percentage of cache occupancy
844system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
845system.cpu0.icache.tags.age_task_id_blocks_1024::2 492 # Occupied blocks per task id
846system.cpu0.icache.tags.age_task_id_blocks_1024::3 20 # Occupied blocks per task id
847system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
848system.cpu0.icache.tags.tag_accesses 10303980 # Number of tag accesses
849system.cpu0.icache.tags.data_accesses 10303980 # Number of data accesses
850system.cpu0.icache.ReadReq_hits::cpu0.inst 8197716 # number of ReadReq hits
851system.cpu0.icache.ReadReq_hits::total 8197716 # number of ReadReq hits
852system.cpu0.icache.demand_hits::cpu0.inst 8197716 # number of demand (read+write) hits
853system.cpu0.icache.demand_hits::total 8197716 # number of demand (read+write) hits
854system.cpu0.icache.overall_hits::cpu0.inst 8197716 # number of overall hits
855system.cpu0.icache.overall_hits::total 8197716 # number of overall hits
856system.cpu0.icache.ReadReq_misses::cpu0.inst 1084226 # number of ReadReq misses
857system.cpu0.icache.ReadReq_misses::total 1084226 # number of ReadReq misses
--- 103 unchanged lines hidden (view full) ---
961system.cpu1.itb.write_hits 0 # DTB write hits
962system.cpu1.itb.write_misses 0 # DTB write misses
963system.cpu1.itb.write_acv 0 # DTB write access violations
964system.cpu1.itb.write_accesses 0 # DTB write accesses
965system.cpu1.itb.data_hits 0 # DTB hits
966system.cpu1.itb.data_misses 0 # DTB misses
967system.cpu1.itb.data_acv 0 # DTB access violations
968system.cpu1.itb.data_accesses 0 # DTB accesses
969system.cpu1.numCycles 10299543 # number of cpu cycles simulated
970system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
971system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
972system.cpu1.fetch.icacheStallCycles 3708105 # Number of cycles fetch is stalled on an Icache miss
973system.cpu1.fetch.Insts 10416725 # Number of instructions fetch has processed
974system.cpu1.fetch.Branches 2642221 # Number of branches that fetch encountered
975system.cpu1.fetch.predictedBranches 708563 # Number of branches that fetch has predicted taken
976system.cpu1.fetch.Cycles 5867887 # Number of cycles fetch has run and was not squashing or blocked
--- 278 unchanged lines hidden (view full) ---
1255system.cpu1.ipc 0.556337 # IPC: Instructions Per Cycle
1256system.cpu1.ipc_total 0.556337 # IPC: Total IPC of All Threads
1257system.cpu1.int_regfile_reads 8470716 # number of integer regfile reads
1258system.cpu1.int_regfile_writes 4619691 # number of integer regfile writes
1259system.cpu1.fp_regfile_reads 26922 # number of floating regfile reads
1260system.cpu1.fp_regfile_writes 25344 # number of floating regfile writes
1261system.cpu1.misc_regfile_reads 302216 # number of misc regfile reads
1262system.cpu1.misc_regfile_writes 137559 # number of misc regfile writes
1263system.cpu1.dcache.tags.replacements 64410 # number of replacements
1264system.cpu1.dcache.tags.tagsinuse 463.614906 # Cycle average of tags in use
1265system.cpu1.dcache.tags.total_refs 1794834 # Total number of references to valid blocks.
1266system.cpu1.dcache.tags.sampled_refs 64922 # Sample count of references to valid blocks.
1267system.cpu1.dcache.tags.avg_refs 27.646006 # Average number of references to valid blocks.
1268system.cpu1.dcache.tags.warmup_cycle 1880101020500 # Cycle when the warmup percentage was hit.
1269system.cpu1.dcache.tags.occ_blocks::cpu1.data 463.614906 # Average occupied blocks per requestor
1270system.cpu1.dcache.tags.occ_percent::cpu1.data 0.905498 # Average percentage of cache occupancy
1271system.cpu1.dcache.tags.occ_percent::total 0.905498 # Average percentage of cache occupancy
1272system.cpu1.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
1273system.cpu1.dcache.tags.age_task_id_blocks_1024::0 244 # Occupied blocks per task id
1274system.cpu1.dcache.tags.age_task_id_blocks_1024::1 222 # Occupied blocks per task id
1275system.cpu1.dcache.tags.age_task_id_blocks_1024::2 46 # Occupied blocks per task id
1276system.cpu1.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
1277system.cpu1.dcache.tags.tag_accesses 8336582 # Number of tag accesses
1278system.cpu1.dcache.tags.data_accesses 8336582 # Number of data accesses
1279system.cpu1.dcache.ReadReq_hits::cpu1.data 1188882 # number of ReadReq hits
1280system.cpu1.dcache.ReadReq_hits::total 1188882 # number of ReadReq hits
1281system.cpu1.dcache.WriteReq_hits::cpu1.data 570377 # number of WriteReq hits
1282system.cpu1.dcache.WriteReq_hits::total 570377 # number of WriteReq hits
1283system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 16198 # number of LoadLockedReq hits
1284system.cpu1.dcache.LoadLockedReq_hits::total 16198 # number of LoadLockedReq hits
1285system.cpu1.dcache.StoreCondReq_hits::cpu1.data 15147 # number of StoreCondReq hits
1286system.cpu1.dcache.StoreCondReq_hits::total 15147 # number of StoreCondReq hits
--- 144 unchanged lines hidden (view full) ---
1431system.cpu1.dcache.demand_avg_mshr_miss_latency::cpu1.data 24901.649770 # average overall mshr miss latency
1432system.cpu1.dcache.demand_avg_mshr_miss_latency::total 24901.649770 # average overall mshr miss latency
1433system.cpu1.dcache.overall_avg_mshr_miss_latency::cpu1.data 24901.649770 # average overall mshr miss latency
1434system.cpu1.dcache.overall_avg_mshr_miss_latency::total 24901.649770 # average overall mshr miss latency
1435system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 202982.876712 # average ReadReq mshr uncacheable latency
1436system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::total 202982.876712 # average ReadReq mshr uncacheable latency
1437system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data 10855.494505 # average overall mshr uncacheable latency
1438system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::total 10855.494505 # average overall mshr uncacheable latency
1439system.cpu1.icache.tags.replacements 125381 # number of replacements
1440system.cpu1.icache.tags.tagsinuse 466.454678 # Cycle average of tags in use
1441system.cpu1.icache.tags.total_refs 1056750 # Total number of references to valid blocks.
1442system.cpu1.icache.tags.sampled_refs 125892 # Sample count of references to valid blocks.
1443system.cpu1.icache.tags.avg_refs 8.394100 # Average number of references to valid blocks.
1444system.cpu1.icache.tags.warmup_cycle 1880706304500 # Cycle when the warmup percentage was hit.
1445system.cpu1.icache.tags.occ_blocks::cpu1.inst 466.454678 # Average occupied blocks per requestor
1446system.cpu1.icache.tags.occ_percent::cpu1.inst 0.911044 # Average percentage of cache occupancy
1447system.cpu1.icache.tags.occ_percent::total 0.911044 # Average percentage of cache occupancy
1448system.cpu1.icache.tags.occ_task_id_blocks::1024 511 # Occupied blocks per task id
1449system.cpu1.icache.tags.age_task_id_blocks_1024::0 75 # Occupied blocks per task id
1450system.cpu1.icache.tags.age_task_id_blocks_1024::1 23 # Occupied blocks per task id
1451system.cpu1.icache.tags.age_task_id_blocks_1024::2 412 # Occupied blocks per task id
1452system.cpu1.icache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id
1453system.cpu1.icache.tags.occ_task_id_percent::1024 0.998047 # Percentage of cache occupancy per task id
1454system.cpu1.icache.tags.tag_accesses 1315314 # Number of tag accesses
1455system.cpu1.icache.tags.data_accesses 1315314 # Number of data accesses
1456system.cpu1.icache.ReadReq_hits::cpu1.inst 1056751 # number of ReadReq hits
1457system.cpu1.icache.ReadReq_hits::total 1056751 # number of ReadReq hits
1458system.cpu1.icache.demand_hits::cpu1.inst 1056751 # number of demand (read+write) hits
1459system.cpu1.icache.demand_hits::total 1056751 # number of demand (read+write) hits
1460system.cpu1.icache.overall_hits::cpu1.inst 1056751 # number of overall hits
1461system.cpu1.icache.overall_hits::total 1056751 # number of overall hits
1462system.cpu1.icache.ReadReq_misses::cpu1.inst 132616 # number of ReadReq misses
1463system.cpu1.icache.ReadReq_misses::total 132616 # number of ReadReq misses
--- 70 unchanged lines hidden (view full) ---
1534system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes.
1535system.disk0.dma_write_txs 395 # Number of DMA write transactions.
1536system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
1537system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
1538system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
1539system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
1540system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
1541system.disk2.dma_write_txs 1 # Number of DMA write transactions.
1542system.iobus.trans_dist::ReadReq 7381 # Transaction distribution
1543system.iobus.trans_dist::ReadResp 7381 # Transaction distribution
1544system.iobus.trans_dist::WriteReq 53943 # Transaction distribution
1545system.iobus.trans_dist::WriteResp 53943 # Transaction distribution
1546system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 10586 # Packet count per connected master and slave (bytes)
1547system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1002 # Packet count per connected master and slave (bytes)
1548system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes)
1549system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes)
--- 38 unchanged lines hidden (view full) ---
1588system.iobus.reqLayer26.occupancy 93000 # Layer occupancy (ticks)
1589system.iobus.reqLayer26.utilization 0.0 # Layer utilization (%)
1590system.iobus.reqLayer27.occupancy 216209541 # Layer occupancy (ticks)
1591system.iobus.reqLayer27.utilization 0.0 # Layer utilization (%)
1592system.iobus.respLayer0.occupancy 26789000 # Layer occupancy (ticks)
1593system.iobus.respLayer0.utilization 0.0 # Layer utilization (%)
1594system.iobus.respLayer1.occupancy 41964000 # Layer occupancy (ticks)
1595system.iobus.respLayer1.utilization 0.0 # Layer utilization (%)
1596system.iocache.tags.replacements 41702 # number of replacements
1597system.iocache.tags.tagsinuse 0.516326 # Cycle average of tags in use
1598system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
1599system.iocache.tags.sampled_refs 41718 # Sample count of references to valid blocks.
1600system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
1601system.iocache.tags.warmup_cycle 1712300449000 # Cycle when the warmup percentage was hit.
1602system.iocache.tags.occ_blocks::tsunami.ide 0.516326 # Average occupied blocks per requestor
1603system.iocache.tags.occ_percent::tsunami.ide 0.032270 # Average percentage of cache occupancy
1604system.iocache.tags.occ_percent::total 0.032270 # Average percentage of cache occupancy
1605system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id
1606system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id
1607system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
1608system.iocache.tags.tag_accesses 375606 # Number of tag accesses
1609system.iocache.tags.data_accesses 375606 # Number of data accesses
1610system.iocache.ReadReq_misses::tsunami.ide 182 # number of ReadReq misses
1611system.iocache.ReadReq_misses::total 182 # number of ReadReq misses
1612system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses
1613system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses
1614system.iocache.demand_misses::tsunami.ide 41734 # number of demand (read+write) misses
1615system.iocache.demand_misses::total 41734 # number of demand (read+write) misses
1616system.iocache.overall_misses::tsunami.ide 41734 # number of overall misses
1617system.iocache.overall_misses::total 41734 # number of overall misses
--- 64 unchanged lines hidden (view full) ---
1682system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 75900.456044 # average ReadReq mshr miss latency
1683system.iocache.ReadReq_avg_mshr_miss_latency::total 75900.456044 # average ReadReq mshr miss latency
1684system.iocache.WriteLineReq_avg_mshr_miss_latency::tsunami.ide 66906.368093 # average WriteLineReq mshr miss latency
1685system.iocache.WriteLineReq_avg_mshr_miss_latency::total 66906.368093 # average WriteLineReq mshr miss latency
1686system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 66945.590885 # average overall mshr miss latency
1687system.iocache.demand_avg_mshr_miss_latency::total 66945.590885 # average overall mshr miss latency
1688system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 66945.590885 # average overall mshr miss latency
1689system.iocache.overall_avg_mshr_miss_latency::total 66945.590885 # average overall mshr miss latency
1690system.l2c.tags.replacements 344399 # number of replacements
1691system.l2c.tags.tagsinuse 65257.528904 # Cycle average of tags in use
1692system.l2c.tags.total_refs 4049043 # Total number of references to valid blocks.
1693system.l2c.tags.sampled_refs 409397 # Sample count of references to valid blocks.
1694system.l2c.tags.avg_refs 9.890261 # Average number of references to valid blocks.
1695system.l2c.tags.warmup_cycle 7589084000 # Cycle when the warmup percentage was hit.
1696system.l2c.tags.occ_blocks::writebacks 53234.554738 # Average occupied blocks per requestor
1697system.l2c.tags.occ_blocks::cpu0.inst 5306.808814 # Average occupied blocks per requestor
--- 10 unchanged lines hidden (view full) ---
1708system.l2c.tags.age_task_id_blocks_1024::0 232 # Occupied blocks per task id
1709system.l2c.tags.age_task_id_blocks_1024::1 3509 # Occupied blocks per task id
1710system.l2c.tags.age_task_id_blocks_1024::2 3235 # Occupied blocks per task id
1711system.l2c.tags.age_task_id_blocks_1024::3 6125 # Occupied blocks per task id
1712system.l2c.tags.age_task_id_blocks_1024::4 51897 # Occupied blocks per task id
1713system.l2c.tags.occ_task_id_percent::1024 0.991791 # Percentage of cache occupancy per task id
1714system.l2c.tags.tag_accesses 38854214 # Number of tag accesses
1715system.l2c.tags.data_accesses 38854214 # Number of data accesses
1716system.l2c.WritebackDirty_hits::writebacks 830750 # number of WritebackDirty hits
1717system.l2c.WritebackDirty_hits::total 830750 # number of WritebackDirty hits
1718system.l2c.WritebackClean_hits::writebacks 873391 # number of WritebackClean hits
1719system.l2c.WritebackClean_hits::total 873391 # number of WritebackClean hits
1720system.l2c.UpgradeReq_hits::cpu0.data 189 # number of UpgradeReq hits
1721system.l2c.UpgradeReq_hits::cpu1.data 76 # number of UpgradeReq hits
1722system.l2c.UpgradeReq_hits::total 265 # number of UpgradeReq hits
1723system.l2c.SCUpgradeReq_hits::cpu0.data 96 # number of SCUpgradeReq hits
--- 290 unchanged lines hidden (view full) ---
2014system.l2c.overall_avg_mshr_uncacheable_latency::cpu1.data 10186.996337 # average overall mshr uncacheable latency
2015system.l2c.overall_avg_mshr_uncacheable_latency::total 77070.495151 # average overall mshr uncacheable latency
2016system.membus.snoop_filter.tot_requests 843888 # Total number of requests made to the snoop filter.
2017system.membus.snoop_filter.hit_single_requests 393117 # Number of requests hitting in the snoop filter with a single holder of the requested data.
2018system.membus.snoop_filter.hit_multi_requests 439 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
2019system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
2020system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
2021system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
2022system.membus.trans_dist::ReadReq 7199 # Transaction distribution
2023system.membus.trans_dist::ReadResp 297053 # Transaction distribution
2024system.membus.trans_dist::WriteReq 12391 # Transaction distribution
2025system.membus.trans_dist::WriteResp 12391 # Transaction distribution
2026system.membus.trans_dist::WritebackDirty 122655 # Transaction distribution
2027system.membus.trans_dist::CleanEvict 262560 # Transaction distribution
2028system.membus.trans_dist::UpgradeReq 5361 # Transaction distribution
2029system.membus.trans_dist::SCUpgradeReq 1592 # Transaction distribution
--- 33 unchanged lines hidden (view full) ---
2063system.membus.reqLayer1.occupancy 1351079796 # Layer occupancy (ticks)
2064system.membus.reqLayer1.utilization 0.1 # Layer utilization (%)
2065system.membus.reqLayer2.occupancy 60000 # Layer occupancy (ticks)
2066system.membus.reqLayer2.utilization 0.0 # Layer utilization (%)
2067system.membus.respLayer1.occupancy 2171993250 # Layer occupancy (ticks)
2068system.membus.respLayer1.utilization 0.1 # Layer utilization (%)
2069system.membus.respLayer2.occupancy 976613 # Layer occupancy (ticks)
2070system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
2071system.toL2Bus.snoop_filter.tot_requests 5115302 # Total number of requests made to the snoop filter.
2072system.toL2Bus.snoop_filter.hit_single_requests 2557070 # Number of requests hitting in the snoop filter with a single holder of the requested data.
2073system.toL2Bus.snoop_filter.hit_multi_requests 337938 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
2074system.toL2Bus.snoop_filter.tot_snoops 1067 # Total number of snoops made to the snoop filter.
2075system.toL2Bus.snoop_filter.hit_single_snoops 999 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
2076system.toL2Bus.snoop_filter.hit_multi_snoops 68 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
2077system.toL2Bus.trans_dist::ReadReq 7199 # Transaction distribution
2078system.toL2Bus.trans_dist::ReadResp 2263337 # Transaction distribution
2079system.toL2Bus.trans_dist::WriteReq 12391 # Transaction distribution
2080system.toL2Bus.trans_dist::WriteResp 12391 # Transaction distribution
2081system.toL2Bus.trans_dist::WritebackDirty 911885 # Transaction distribution
2082system.toL2Bus.trans_dist::WritebackClean 1146691 # Transaction distribution
2083system.toL2Bus.trans_dist::CleanEvict 834780 # Transaction distribution
2084system.toL2Bus.trans_dist::UpgradeReq 5446 # Transaction distribution
--- 38 unchanged lines hidden (view full) ---
2123system.toL2Bus.respLayer0.occupancy 1534824957 # Layer occupancy (ticks)
2124system.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%)
2125system.toL2Bus.respLayer1.occupancy 2028150819 # Layer occupancy (ticks)
2126system.toL2Bus.respLayer1.utilization 0.1 # Layer utilization (%)
2127system.toL2Bus.respLayer2.occupancy 190444943 # Layer occupancy (ticks)
2128system.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%)
2129system.toL2Bus.respLayer3.occupancy 107558787 # Layer occupancy (ticks)
2130system.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%)
2131system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
2132system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
2133system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
2134system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
2135system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
2136system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post
2137system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
2138system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
--- 15 unchanged lines hidden (view full) ---
2154system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post
2155system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
2156system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
2157system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post
2158system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
2159system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
2160system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
2161system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
2162system.cpu0.kern.inst.arm 0 # number of arm instructions executed
2163system.cpu0.kern.inst.quiesce 6376 # number of quiesce instructions executed
2164system.cpu0.kern.inst.hwrei 198541 # number of hwrei instructions executed
2165system.cpu0.kern.ipl_count::0 71138 40.62% 40.62% # number of times we switched to this ipl
2166system.cpu0.kern.ipl_count::21 133 0.08% 40.69% # number of times we switched to this ipl
2167system.cpu0.kern.ipl_count::22 1928 1.10% 41.79% # number of times we switched to this ipl
2168system.cpu0.kern.ipl_count::30 20 0.01% 41.80% # number of times we switched to this ipl
2169system.cpu0.kern.ipl_count::31 101928 58.20% 100.00% # number of times we switched to this ipl
--- 151 unchanged lines hidden ---