| config.ini (11103:38f6188421e0) | config.ini (11245:1c5102c0a7a9) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain |
| 18console=/scratch/nilay/GEM5/system/binaries/console | 18console=/work/gem5/dist/binaries/console |
| 19eventq_index=0 20init_param=0 | 19eventq_index=0 20init_param=0 |
| 21kernel=/scratch/nilay/GEM5/system/binaries/vmlinux | 21kernel=/work/gem5/dist/binaries/vmlinux |
| 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem 28mmap_using_noreserve=false | 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem 28mmap_using_noreserve=false |
| 29multi_thread=false |
|
| 29num_work_ids=16 | 30num_work_ids=16 |
| 30pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal 31readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh | 31pal=/work/gem5/dist/binaries/ts_osfpal 32readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh |
| 32symbolfile= 33system_rev=1024 34system_type=34 35work_begin_ckpt_count=0 36work_begin_cpu_id_exit=-1 37work_begin_exit_count=0 38work_cpus_ckpt_count=0 39work_end_ckpt_count=0 --- 126 unchanged lines hidden (view full) --- 166numThreads=1 167 168[system.cpu0.dcache] 169type=Cache 170children=tags 171addr_ranges=0:18446744073709551615 172assoc=4 173clk_domain=system.cpu_clk_domain | 33symbolfile= 34system_rev=1024 35system_type=34 36work_begin_ckpt_count=0 37work_begin_cpu_id_exit=-1 38work_begin_exit_count=0 39work_cpus_ckpt_count=0 40work_end_ckpt_count=0 --- 126 unchanged lines hidden (view full) --- 167numThreads=1 168 169[system.cpu0.dcache] 170type=Cache 171children=tags 172addr_ranges=0:18446744073709551615 173assoc=4 174clk_domain=system.cpu_clk_domain |
| 175clusivity=mostly_incl |
|
| 174demand_mshr_reserve=1 175eventq_index=0 176forward_snoops=true 177hit_latency=2 178is_read_only=false 179max_miss_count=0 180mshrs=4 181prefetch_on_access=false 182prefetcher=Null 183response_latency=2 184sequential_access=false 185size=32768 186system=system 187tags=system.cpu0.dcache.tags 188tgts_per_mshr=20 189write_buffers=8 | 176demand_mshr_reserve=1 177eventq_index=0 178forward_snoops=true 179hit_latency=2 180is_read_only=false 181max_miss_count=0 182mshrs=4 183prefetch_on_access=false 184prefetcher=Null 185response_latency=2 186sequential_access=false 187size=32768 188system=system 189tags=system.cpu0.dcache.tags 190tgts_per_mshr=20 191write_buffers=8 |
| 192writeback_clean=false |
|
| 190cpu_side=system.cpu0.dcache_port 191mem_side=system.toL2Bus.slave[1] 192 193[system.cpu0.dcache.tags] 194type=LRU 195assoc=4 196block_size=64 197clk_domain=system.cpu_clk_domain --- 315 unchanged lines hidden (view full) --- 513pipelined=false 514 515[system.cpu0.icache] 516type=Cache 517children=tags 518addr_ranges=0:18446744073709551615 519assoc=1 520clk_domain=system.cpu_clk_domain | 193cpu_side=system.cpu0.dcache_port 194mem_side=system.toL2Bus.slave[1] 195 196[system.cpu0.dcache.tags] 197type=LRU 198assoc=4 199block_size=64 200clk_domain=system.cpu_clk_domain --- 315 unchanged lines hidden (view full) --- 516pipelined=false 517 518[system.cpu0.icache] 519type=Cache 520children=tags 521addr_ranges=0:18446744073709551615 522assoc=1 523clk_domain=system.cpu_clk_domain |
| 524clusivity=mostly_incl |
|
| 521demand_mshr_reserve=1 522eventq_index=0 523forward_snoops=true 524hit_latency=2 525is_read_only=true 526max_miss_count=0 527mshrs=4 528prefetch_on_access=false 529prefetcher=Null 530response_latency=2 531sequential_access=false 532size=32768 533system=system 534tags=system.cpu0.icache.tags 535tgts_per_mshr=20 536write_buffers=8 | 525demand_mshr_reserve=1 526eventq_index=0 527forward_snoops=true 528hit_latency=2 529is_read_only=true 530max_miss_count=0 531mshrs=4 532prefetch_on_access=false 533prefetcher=Null 534response_latency=2 535sequential_access=false 536size=32768 537system=system 538tags=system.cpu0.icache.tags 539tgts_per_mshr=20 540write_buffers=8 |
| 541writeback_clean=true |
|
| 537cpu_side=system.cpu0.icache_port 538mem_side=system.toL2Bus.slave[0] 539 540[system.cpu0.icache.tags] 541type=LRU 542assoc=1 543block_size=64 544clk_domain=system.cpu_clk_domain --- 126 unchanged lines hidden (view full) --- 671numThreads=1 672 673[system.cpu1.dcache] 674type=Cache 675children=tags 676addr_ranges=0:18446744073709551615 677assoc=4 678clk_domain=system.cpu_clk_domain | 542cpu_side=system.cpu0.icache_port 543mem_side=system.toL2Bus.slave[0] 544 545[system.cpu0.icache.tags] 546type=LRU 547assoc=1 548block_size=64 549clk_domain=system.cpu_clk_domain --- 126 unchanged lines hidden (view full) --- 676numThreads=1 677 678[system.cpu1.dcache] 679type=Cache 680children=tags 681addr_ranges=0:18446744073709551615 682assoc=4 683clk_domain=system.cpu_clk_domain |
| 684clusivity=mostly_incl |
|
| 679demand_mshr_reserve=1 680eventq_index=0 681forward_snoops=true 682hit_latency=2 683is_read_only=false 684max_miss_count=0 685mshrs=4 686prefetch_on_access=false 687prefetcher=Null 688response_latency=2 689sequential_access=false 690size=32768 691system=system 692tags=system.cpu1.dcache.tags 693tgts_per_mshr=20 694write_buffers=8 | 685demand_mshr_reserve=1 686eventq_index=0 687forward_snoops=true 688hit_latency=2 689is_read_only=false 690max_miss_count=0 691mshrs=4 692prefetch_on_access=false 693prefetcher=Null 694response_latency=2 695sequential_access=false 696size=32768 697system=system 698tags=system.cpu1.dcache.tags 699tgts_per_mshr=20 700write_buffers=8 |
| 701writeback_clean=false |
|
| 695cpu_side=system.cpu1.dcache_port 696mem_side=system.toL2Bus.slave[3] 697 698[system.cpu1.dcache.tags] 699type=LRU 700assoc=4 701block_size=64 702clk_domain=system.cpu_clk_domain --- 315 unchanged lines hidden (view full) --- 1018pipelined=false 1019 1020[system.cpu1.icache] 1021type=Cache 1022children=tags 1023addr_ranges=0:18446744073709551615 1024assoc=1 1025clk_domain=system.cpu_clk_domain | 702cpu_side=system.cpu1.dcache_port 703mem_side=system.toL2Bus.slave[3] 704 705[system.cpu1.dcache.tags] 706type=LRU 707assoc=4 708block_size=64 709clk_domain=system.cpu_clk_domain --- 315 unchanged lines hidden (view full) --- 1025pipelined=false 1026 1027[system.cpu1.icache] 1028type=Cache 1029children=tags 1030addr_ranges=0:18446744073709551615 1031assoc=1 1032clk_domain=system.cpu_clk_domain |
| 1033clusivity=mostly_incl |
|
| 1026demand_mshr_reserve=1 1027eventq_index=0 1028forward_snoops=true 1029hit_latency=2 1030is_read_only=true 1031max_miss_count=0 1032mshrs=4 1033prefetch_on_access=false 1034prefetcher=Null 1035response_latency=2 1036sequential_access=false 1037size=32768 1038system=system 1039tags=system.cpu1.icache.tags 1040tgts_per_mshr=20 1041write_buffers=8 | 1034demand_mshr_reserve=1 1035eventq_index=0 1036forward_snoops=true 1037hit_latency=2 1038is_read_only=true 1039max_miss_count=0 1040mshrs=4 1041prefetch_on_access=false 1042prefetcher=Null 1043response_latency=2 1044sequential_access=false 1045size=32768 1046system=system 1047tags=system.cpu1.icache.tags 1048tgts_per_mshr=20 1049write_buffers=8 |
| 1050writeback_clean=true |
|
| 1042cpu_side=system.cpu1.icache_port 1043mem_side=system.toL2Bus.slave[2] 1044 1045[system.cpu1.icache.tags] 1046type=LRU 1047assoc=1 1048block_size=64 1049clk_domain=system.cpu_clk_domain --- 43 unchanged lines hidden (view full) --- 1093eventq_index=0 1094image_file= 1095read_only=false 1096table_size=65536 1097 1098[system.disk0.image.child] 1099type=RawDiskImage 1100eventq_index=0 | 1051cpu_side=system.cpu1.icache_port 1052mem_side=system.toL2Bus.slave[2] 1053 1054[system.cpu1.icache.tags] 1055type=LRU 1056assoc=1 1057block_size=64 1058clk_domain=system.cpu_clk_domain --- 43 unchanged lines hidden (view full) --- 1102eventq_index=0 1103image_file= 1104read_only=false 1105table_size=65536 1106 1107[system.disk0.image.child] 1108type=RawDiskImage 1109eventq_index=0 |
| 1101image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img | 1110image_file=/work/gem5/dist/disks/linux-latest.img |
| 1102read_only=true 1103 1104[system.disk2] 1105type=IdeDisk 1106children=image 1107delay=1000000 1108driveID=master 1109eventq_index=0 --- 6 unchanged lines hidden (view full) --- 1116eventq_index=0 1117image_file= 1118read_only=false 1119table_size=65536 1120 1121[system.disk2.image.child] 1122type=RawDiskImage 1123eventq_index=0 | 1111read_only=true 1112 1113[system.disk2] 1114type=IdeDisk 1115children=image 1116delay=1000000 1117driveID=master 1118eventq_index=0 --- 6 unchanged lines hidden (view full) --- 1125eventq_index=0 1126image_file= 1127read_only=false 1128table_size=65536 1129 1130[system.disk2.image.child] 1131type=RawDiskImage 1132eventq_index=0 |
| 1124image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img | 1133image_file=/work/gem5/dist/disks/linux-bigswap2.img |
| 1125read_only=true 1126 1127[system.dvfs_handler] 1128type=DVFSHandler 1129domains= 1130enable=false 1131eventq_index=0 1132sys_clk_domain=system.clk_domain --- 6 unchanged lines hidden (view full) --- 1139 1140[system.iobus] 1141type=NoncoherentXBar 1142clk_domain=system.clk_domain 1143eventq_index=0 1144forward_latency=1 1145frontend_latency=2 1146response_latency=2 | 1134read_only=true 1135 1136[system.dvfs_handler] 1137type=DVFSHandler 1138domains= 1139enable=false 1140eventq_index=0 1141sys_clk_domain=system.clk_domain --- 6 unchanged lines hidden (view full) --- 1148 1149[system.iobus] 1150type=NoncoherentXBar 1151clk_domain=system.clk_domain 1152eventq_index=0 1153forward_latency=1 1154frontend_latency=2 1155response_latency=2 |
| 1147use_default_range=true | 1156use_default_range=false |
| 1148width=16 | 1157width=16 |
| 1149default=system.tsunami.pciconfig.pio 1150master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side | 1158master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side |
| 1151slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 1152 1153[system.iocache] 1154type=Cache 1155children=tags 1156addr_ranges=0:134217727 1157assoc=8 1158clk_domain=system.clk_domain | 1159slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 1160 1161[system.iocache] 1162type=Cache 1163children=tags 1164addr_ranges=0:134217727 1165assoc=8 1166clk_domain=system.clk_domain |
| 1167clusivity=mostly_incl |
|
| 1159demand_mshr_reserve=1 1160eventq_index=0 1161forward_snoops=false 1162hit_latency=50 1163is_read_only=false 1164max_miss_count=0 1165mshrs=20 1166prefetch_on_access=false 1167prefetcher=Null 1168response_latency=50 1169sequential_access=false 1170size=1024 1171system=system 1172tags=system.iocache.tags 1173tgts_per_mshr=12 1174write_buffers=8 | 1168demand_mshr_reserve=1 1169eventq_index=0 1170forward_snoops=false 1171hit_latency=50 1172is_read_only=false 1173max_miss_count=0 1174mshrs=20 1175prefetch_on_access=false 1176prefetcher=Null 1177response_latency=50 1178sequential_access=false 1179size=1024 1180system=system 1181tags=system.iocache.tags 1182tgts_per_mshr=12 1183write_buffers=8 |
| 1175cpu_side=system.iobus.master[29] | 1184writeback_clean=false 1185cpu_side=system.iobus.master[27] |
| 1176mem_side=system.membus.slave[2] 1177 1178[system.iocache.tags] 1179type=LRU 1180assoc=8 1181block_size=64 1182clk_domain=system.clk_domain 1183eventq_index=0 1184hit_latency=50 1185sequential_access=false 1186size=1024 1187 1188[system.l2c] 1189type=Cache 1190children=tags 1191addr_ranges=0:18446744073709551615 1192assoc=8 1193clk_domain=system.cpu_clk_domain | 1186mem_side=system.membus.slave[2] 1187 1188[system.iocache.tags] 1189type=LRU 1190assoc=8 1191block_size=64 1192clk_domain=system.clk_domain 1193eventq_index=0 1194hit_latency=50 1195sequential_access=false 1196size=1024 1197 1198[system.l2c] 1199type=Cache 1200children=tags 1201addr_ranges=0:18446744073709551615 1202assoc=8 1203clk_domain=system.cpu_clk_domain |
| 1204clusivity=mostly_incl |
|
| 1194demand_mshr_reserve=1 1195eventq_index=0 1196forward_snoops=true 1197hit_latency=20 1198is_read_only=false 1199max_miss_count=0 1200mshrs=20 1201prefetch_on_access=false 1202prefetcher=Null 1203response_latency=20 1204sequential_access=false 1205size=4194304 1206system=system 1207tags=system.l2c.tags 1208tgts_per_mshr=12 1209write_buffers=8 | 1205demand_mshr_reserve=1 1206eventq_index=0 1207forward_snoops=true 1208hit_latency=20 1209is_read_only=false 1210max_miss_count=0 1211mshrs=20 1212prefetch_on_access=false 1213prefetcher=Null 1214response_latency=20 1215sequential_access=false 1216size=4194304 1217system=system 1218tags=system.l2c.tags 1219tgts_per_mshr=12 1220write_buffers=8 |
| 1221writeback_clean=false |
|
| 1210cpu_side=system.toL2Bus.master[0] 1211mem_side=system.membus.slave[1] 1212 1213[system.l2c.tags] 1214type=LRU 1215assoc=8 1216block_size=64 1217clk_domain=system.cpu_clk_domain --- 119 unchanged lines hidden (view full) --- 1337children=disk 1338disk=system.simple_disk.disk 1339eventq_index=0 1340system=system 1341 1342[system.simple_disk.disk] 1343type=RawDiskImage 1344eventq_index=0 | 1222cpu_side=system.toL2Bus.master[0] 1223mem_side=system.membus.slave[1] 1224 1225[system.l2c.tags] 1226type=LRU 1227assoc=8 1228block_size=64 1229clk_domain=system.cpu_clk_domain --- 119 unchanged lines hidden (view full) --- 1349children=disk 1350disk=system.simple_disk.disk 1351eventq_index=0 1352system=system 1353 1354[system.simple_disk.disk] 1355type=RawDiskImage 1356eventq_index=0 |
| 1345image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img | 1357image_file=/work/gem5/dist/disks/linux-latest.img |
| 1346read_only=true 1347 1348[system.terminal] 1349type=Terminal 1350eventq_index=0 1351intr_control=system.intrctrl 1352number=0 1353output=true 1354port=3456 1355 1356[system.toL2Bus] 1357type=CoherentXBar | 1358read_only=true 1359 1360[system.terminal] 1361type=Terminal 1362eventq_index=0 1363intr_control=system.intrctrl 1364number=0 1365output=true 1366port=3456 1367 1368[system.toL2Bus] 1369type=CoherentXBar |
| 1370children=snoop_filter |
|
| 1358clk_domain=system.cpu_clk_domain 1359eventq_index=0 1360forward_latency=0 1361frontend_latency=1 1362response_latency=1 | 1371clk_domain=system.cpu_clk_domain 1372eventq_index=0 1373forward_latency=0 1374frontend_latency=1 1375response_latency=1 |
| 1363snoop_filter=Null | 1376snoop_filter=system.toL2Bus.snoop_filter |
| 1364snoop_response_latency=1 1365system=system 1366use_default_range=false 1367width=32 1368master=system.l2c.cpu_side 1369slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 1370 | 1377snoop_response_latency=1 1378system=system 1379use_default_range=false 1380width=32 1381master=system.l2c.cpu_side 1382slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 1383 |
| 1384[system.toL2Bus.snoop_filter] 1385type=SnoopFilter 1386eventq_index=0 1387lookup_latency=0 1388max_capacity=8388608 1389system=system 1390 |
|
| 1371[system.tsunami] 1372type=Tsunami | 1391[system.tsunami] 1392type=Tsunami |
| 1373children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart | 1393children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart |
| 1374eventq_index=0 1375intrctrl=system.intrctrl 1376system=system 1377 1378[system.tsunami.backdoor] 1379type=AlphaBackdoor 1380clk_domain=system.clk_domain 1381cpu=system.cpu0 --- 96 unchanged lines hidden (view full) --- 1478dma_desc_free=false 1479dma_no_allocate=true 1480dma_read_delay=0 1481dma_read_factor=0 1482dma_write_delay=0 1483dma_write_factor=0 1484eventq_index=0 1485hardware_address=00:90:00:00:00:01 | 1394eventq_index=0 1395intrctrl=system.intrctrl 1396system=system 1397 1398[system.tsunami.backdoor] 1399type=AlphaBackdoor 1400clk_domain=system.clk_domain 1401cpu=system.cpu0 --- 96 unchanged lines hidden (view full) --- 1498dma_desc_free=false 1499dma_no_allocate=true 1500dma_read_delay=0 1501dma_read_factor=0 1502dma_write_delay=0 1503dma_write_factor=0 1504eventq_index=0 1505hardware_address=00:90:00:00:00:01 |
| 1506host=system.tsunami.pchip |
|
| 1486intr_delay=10000000 1487pci_bus=0 1488pci_dev=1 1489pci_func=0 1490pio_latency=30000 | 1507intr_delay=10000000 1508pci_bus=0 1509pci_dev=1 1510pci_func=0 1511pio_latency=30000 |
| 1491platform=system.tsunami | |
| 1492rss=false 1493rx_delay=1000000 1494rx_fifo_size=524288 1495rx_filter=true 1496rx_thread=false 1497system=system 1498tx_delay=1000000 1499tx_fifo_size=524288 1500tx_thread=false | 1512rss=false 1513rx_delay=1000000 1514rx_fifo_size=524288 1515rx_filter=true 1516rx_thread=false 1517system=system 1518tx_delay=1000000 1519tx_fifo_size=524288 1520tx_thread=false |
| 1501config=system.iobus.master[28] | |
| 1502dma=system.iobus.slave[2] | 1521dma=system.iobus.slave[2] |
| 1503pio=system.iobus.master[27] | 1522pio=system.iobus.master[26] |
| 1504 1505[system.tsunami.fake_OROM] 1506type=IsaFake 1507clk_domain=system.clk_domain 1508eventq_index=0 1509fake_mem=false 1510pio_addr=8796093677568 1511pio_latency=100000 --- 416 unchanged lines hidden (view full) --- 1928SubsystemID=0 1929SubsystemVendorID=0 1930VendorID=32902 1931clk_domain=system.clk_domain 1932config_latency=20000 1933ctrl_offset=0 1934disks=system.disk0 system.disk2 1935eventq_index=0 | 1523 1524[system.tsunami.fake_OROM] 1525type=IsaFake 1526clk_domain=system.clk_domain 1527eventq_index=0 1528fake_mem=false 1529pio_addr=8796093677568 1530pio_latency=100000 --- 416 unchanged lines hidden (view full) --- 1947SubsystemID=0 1948SubsystemVendorID=0 1949VendorID=32902 1950clk_domain=system.clk_domain 1951config_latency=20000 1952ctrl_offset=0 1953disks=system.disk0 system.disk2 1954eventq_index=0 |
| 1955host=system.tsunami.pchip |
|
| 1936io_shift=0 1937pci_bus=0 1938pci_dev=0 1939pci_func=0 1940pio_latency=30000 | 1956io_shift=0 1957pci_bus=0 1958pci_dev=0 1959pci_func=0 1960pio_latency=30000 |
| 1941platform=system.tsunami | |
| 1942system=system | 1961system=system |
| 1943config=system.iobus.master[26] | |
| 1944dma=system.iobus.slave[1] 1945pio=system.iobus.master[25] 1946 1947[system.tsunami.io] 1948type=TsunamiIO 1949clk_domain=system.clk_domain 1950eventq_index=0 1951frequency=976562500 1952pio_addr=8804615847936 1953pio_latency=100000 1954system=system 1955time=Thu Jan 1 00:00:00 2009 1956tsunami=system.tsunami 1957year_is_bcd=false 1958pio=system.iobus.master[22] 1959 1960[system.tsunami.pchip] 1961type=TsunamiPChip 1962clk_domain=system.clk_domain | 1962dma=system.iobus.slave[1] 1963pio=system.iobus.master[25] 1964 1965[system.tsunami.io] 1966type=TsunamiIO 1967clk_domain=system.clk_domain 1968eventq_index=0 1969frequency=976562500 1970pio_addr=8804615847936 1971pio_latency=100000 1972system=system 1973time=Thu Jan 1 00:00:00 2009 1974tsunami=system.tsunami 1975year_is_bcd=false 1976pio=system.iobus.master[22] 1977 1978[system.tsunami.pchip] 1979type=TsunamiPChip 1980clk_domain=system.clk_domain |
| 1981conf_base=8804649402368 1982conf_device_bits=8 1983conf_size=16777216 |
|
| 1963eventq_index=0 | 1984eventq_index=0 |
| 1985pci_dma_base=0 1986pci_mem_base=8796093022208 1987pci_pio_base=8804615847936 |
|
| 1964pio_addr=8802535473152 1965pio_latency=100000 | 1988pio_addr=8802535473152 1989pio_latency=100000 |
| 1990platform=system.tsunami |
|
| 1966system=system 1967tsunami=system.tsunami 1968pio=system.iobus.master[1] 1969 | 1991system=system 1992tsunami=system.tsunami 1993pio=system.iobus.master[1] 1994 |
| 1970[system.tsunami.pciconfig] 1971type=PciConfigAll 1972bus=0 1973clk_domain=system.clk_domain 1974eventq_index=0 1975pio_addr=0 1976pio_latency=30000 1977platform=system.tsunami 1978size=16777216 1979system=system 1980pio=system.iobus.default 1981 | |
| 1982[system.tsunami.uart] 1983type=Uart8250 1984clk_domain=system.clk_domain 1985eventq_index=0 1986pio_addr=8804615848952 1987pio_latency=100000 1988platform=system.tsunami 1989system=system 1990terminal=system.terminal 1991pio=system.iobus.master[23] 1992 1993[system.voltage_domain] 1994type=VoltageDomain 1995eventq_index=0 1996voltage=1.000000 1997 | 1995[system.tsunami.uart] 1996type=Uart8250 1997clk_domain=system.clk_domain 1998eventq_index=0 1999pio_addr=8804615848952 2000pio_latency=100000 2001platform=system.tsunami 2002system=system 2003terminal=system.terminal 2004pio=system.iobus.master[23] 2005 2006[system.voltage_domain] 2007type=VoltageDomain 2008eventq_index=0 2009voltage=1.000000 2010 |