| config.ini (10513:ca4438b6e39a) | config.ini (10798:74e3c7359393) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain |
| 18console=/dist/binaries/console | 18console=/home/stever/m5/m5_system_2.0b3/binaries/console |
| 19eventq_index=0 20init_param=0 | 19eventq_index=0 20init_param=0 |
| 21kernel=/dist/binaries/vmlinux | 21kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux |
| 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem | 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem |
| 28mmap_using_noreserve=false |
|
| 28num_work_ids=16 | 29num_work_ids=16 |
| 29pal=/dist/binaries/ts_osfpal 30readfile=/work/gem5.latest/tests/halt.sh | 30pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal 31readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh |
| 31symbolfile= 32system_rev=1024 33system_type=34 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 38work_end_ckpt_count=0 --- 105 unchanged lines hidden (view full) --- 144tracer=system.cpu0.tracer 145trapLatency=13 146wbWidth=8 147workload= 148dcache_port=system.cpu0.dcache.cpu_side 149icache_port=system.cpu0.icache.cpu_side 150 151[system.cpu0.branchPred] | 32symbolfile= 33system_rev=1024 34system_type=34 35work_begin_ckpt_count=0 36work_begin_cpu_id_exit=-1 37work_begin_exit_count=0 38work_cpus_ckpt_count=0 39work_end_ckpt_count=0 --- 105 unchanged lines hidden (view full) --- 145tracer=system.cpu0.tracer 146trapLatency=13 147wbWidth=8 148workload= 149dcache_port=system.cpu0.dcache.cpu_side 150icache_port=system.cpu0.icache.cpu_side 151 152[system.cpu0.branchPred] |
| 152type=BranchPredictor | 153type=TournamentBP |
| 153BTBEntries=4096 154BTBTagSize=16 155RASSize=16 156choiceCtrBits=2 157choicePredictorSize=8192 158eventq_index=0 159globalCtrBits=2 160globalPredictorSize=8192 161instShiftAmt=2 162localCtrBits=2 163localHistoryTableSize=2048 164localPredictorSize=2048 165numThreads=1 | 154BTBEntries=4096 155BTBTagSize=16 156RASSize=16 157choiceCtrBits=2 158choicePredictorSize=8192 159eventq_index=0 160globalCtrBits=2 161globalPredictorSize=8192 162instShiftAmt=2 163localCtrBits=2 164localHistoryTableSize=2048 165localPredictorSize=2048 166numThreads=1 |
| 166predType=tournament | |
| 167 168[system.cpu0.dcache] 169type=BaseCache 170children=tags 171addr_ranges=0:18446744073709551615 172assoc=4 173clk_domain=system.cpu_clk_domain | 167 168[system.cpu0.dcache] 169type=BaseCache 170children=tags 171addr_ranges=0:18446744073709551615 172assoc=4 173clk_domain=system.cpu_clk_domain |
| 174demand_mshr_reserve=1 |
|
| 174eventq_index=0 175forward_snoops=true 176hit_latency=2 177is_top_level=true 178max_miss_count=0 179mshrs=4 180prefetch_on_access=false 181prefetcher=Null --- 331 unchanged lines hidden (view full) --- 513opLat=3 514 515[system.cpu0.icache] 516type=BaseCache 517children=tags 518addr_ranges=0:18446744073709551615 519assoc=1 520clk_domain=system.cpu_clk_domain | 175eventq_index=0 176forward_snoops=true 177hit_latency=2 178is_top_level=true 179max_miss_count=0 180mshrs=4 181prefetch_on_access=false 182prefetcher=Null --- 331 unchanged lines hidden (view full) --- 514opLat=3 515 516[system.cpu0.icache] 517type=BaseCache 518children=tags 519addr_ranges=0:18446744073709551615 520assoc=1 521clk_domain=system.cpu_clk_domain |
| 522demand_mshr_reserve=1 |
|
| 521eventq_index=0 522forward_snoops=true 523hit_latency=2 524is_top_level=true 525max_miss_count=0 526mshrs=4 527prefetch_on_access=false 528prefetcher=Null --- 121 unchanged lines hidden (view full) --- 650tracer=system.cpu1.tracer 651trapLatency=13 652wbWidth=8 653workload= 654dcache_port=system.cpu1.dcache.cpu_side 655icache_port=system.cpu1.icache.cpu_side 656 657[system.cpu1.branchPred] | 523eventq_index=0 524forward_snoops=true 525hit_latency=2 526is_top_level=true 527max_miss_count=0 528mshrs=4 529prefetch_on_access=false 530prefetcher=Null --- 121 unchanged lines hidden (view full) --- 652tracer=system.cpu1.tracer 653trapLatency=13 654wbWidth=8 655workload= 656dcache_port=system.cpu1.dcache.cpu_side 657icache_port=system.cpu1.icache.cpu_side 658 659[system.cpu1.branchPred] |
| 658type=BranchPredictor | 660type=TournamentBP |
| 659BTBEntries=4096 660BTBTagSize=16 661RASSize=16 662choiceCtrBits=2 663choicePredictorSize=8192 664eventq_index=0 665globalCtrBits=2 666globalPredictorSize=8192 667instShiftAmt=2 668localCtrBits=2 669localHistoryTableSize=2048 670localPredictorSize=2048 671numThreads=1 | 661BTBEntries=4096 662BTBTagSize=16 663RASSize=16 664choiceCtrBits=2 665choicePredictorSize=8192 666eventq_index=0 667globalCtrBits=2 668globalPredictorSize=8192 669instShiftAmt=2 670localCtrBits=2 671localHistoryTableSize=2048 672localPredictorSize=2048 673numThreads=1 |
| 672predType=tournament | |
| 673 674[system.cpu1.dcache] 675type=BaseCache 676children=tags 677addr_ranges=0:18446744073709551615 678assoc=4 679clk_domain=system.cpu_clk_domain | 674 675[system.cpu1.dcache] 676type=BaseCache 677children=tags 678addr_ranges=0:18446744073709551615 679assoc=4 680clk_domain=system.cpu_clk_domain |
| 681demand_mshr_reserve=1 |
|
| 680eventq_index=0 681forward_snoops=true 682hit_latency=2 683is_top_level=true 684max_miss_count=0 685mshrs=4 686prefetch_on_access=false 687prefetcher=Null --- 331 unchanged lines hidden (view full) --- 1019opLat=3 1020 1021[system.cpu1.icache] 1022type=BaseCache 1023children=tags 1024addr_ranges=0:18446744073709551615 1025assoc=1 1026clk_domain=system.cpu_clk_domain | 682eventq_index=0 683forward_snoops=true 684hit_latency=2 685is_top_level=true 686max_miss_count=0 687mshrs=4 688prefetch_on_access=false 689prefetcher=Null --- 331 unchanged lines hidden (view full) --- 1021opLat=3 1022 1023[system.cpu1.icache] 1024type=BaseCache 1025children=tags 1026addr_ranges=0:18446744073709551615 1027assoc=1 1028clk_domain=system.cpu_clk_domain |
| 1029demand_mshr_reserve=1 |
|
| 1027eventq_index=0 1028forward_snoops=true 1029hit_latency=2 1030is_top_level=true 1031max_miss_count=0 1032mshrs=4 1033prefetch_on_access=false 1034prefetcher=Null --- 59 unchanged lines hidden (view full) --- 1094eventq_index=0 1095image_file= 1096read_only=false 1097table_size=65536 1098 1099[system.disk0.image.child] 1100type=RawDiskImage 1101eventq_index=0 | 1030eventq_index=0 1031forward_snoops=true 1032hit_latency=2 1033is_top_level=true 1034max_miss_count=0 1035mshrs=4 1036prefetch_on_access=false 1037prefetcher=Null --- 59 unchanged lines hidden (view full) --- 1097eventq_index=0 1098image_file= 1099read_only=false 1100table_size=65536 1101 1102[system.disk0.image.child] 1103type=RawDiskImage 1104eventq_index=0 |
| 1102image_file=/dist/disks/linux-latest.img | 1105image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img |
| 1103read_only=true 1104 1105[system.disk2] 1106type=IdeDisk 1107children=image 1108delay=1000000 1109driveID=master 1110eventq_index=0 --- 6 unchanged lines hidden (view full) --- 1117eventq_index=0 1118image_file= 1119read_only=false 1120table_size=65536 1121 1122[system.disk2.image.child] 1123type=RawDiskImage 1124eventq_index=0 | 1106read_only=true 1107 1108[system.disk2] 1109type=IdeDisk 1110children=image 1111delay=1000000 1112driveID=master 1113eventq_index=0 --- 6 unchanged lines hidden (view full) --- 1120eventq_index=0 1121image_file= 1122read_only=false 1123table_size=65536 1124 1125[system.disk2.image.child] 1126type=RawDiskImage 1127eventq_index=0 |
| 1125image_file=/dist/disks/linux-bigswap2.img | 1128image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img |
| 1126read_only=true 1127 1128[system.dvfs_handler] 1129type=DVFSHandler 1130domains= 1131enable=false 1132eventq_index=0 1133sys_clk_domain=system.clk_domain 1134transition_latency=100000000 1135 1136[system.intrctrl] 1137type=IntrControl 1138eventq_index=0 1139sys=system 1140 1141[system.iobus] 1142type=NoncoherentXBar 1143clk_domain=system.clk_domain 1144eventq_index=0 | 1129read_only=true 1130 1131[system.dvfs_handler] 1132type=DVFSHandler 1133domains= 1134enable=false 1135eventq_index=0 1136sys_clk_domain=system.clk_domain 1137transition_latency=100000000 1138 1139[system.intrctrl] 1140type=IntrControl 1141eventq_index=0 1142sys=system 1143 1144[system.iobus] 1145type=NoncoherentXBar 1146clk_domain=system.clk_domain 1147eventq_index=0 |
| 1145header_cycles=1 | 1148forward_latency=1 1149frontend_latency=2 1150response_latency=2 |
| 1146use_default_range=true | 1151use_default_range=true |
| 1147width=8 | 1152width=16 |
| 1148default=system.tsunami.pciconfig.pio 1149master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 1150slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 1151 1152[system.iocache] 1153type=BaseCache 1154children=tags 1155addr_ranges=0:134217727 1156assoc=8 1157clk_domain=system.clk_domain | 1153default=system.tsunami.pciconfig.pio 1154master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 1155slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 1156 1157[system.iocache] 1158type=BaseCache 1159children=tags 1160addr_ranges=0:134217727 1161assoc=8 1162clk_domain=system.clk_domain |
| 1163demand_mshr_reserve=1 |
|
| 1158eventq_index=0 1159forward_snoops=false 1160hit_latency=50 1161is_top_level=true 1162max_miss_count=0 1163mshrs=20 1164prefetch_on_access=false 1165prefetcher=Null --- 19 unchanged lines hidden (view full) --- 1185size=1024 1186 1187[system.l2c] 1188type=BaseCache 1189children=tags 1190addr_ranges=0:18446744073709551615 1191assoc=8 1192clk_domain=system.cpu_clk_domain | 1164eventq_index=0 1165forward_snoops=false 1166hit_latency=50 1167is_top_level=true 1168max_miss_count=0 1169mshrs=20 1170prefetch_on_access=false 1171prefetcher=Null --- 19 unchanged lines hidden (view full) --- 1191size=1024 1192 1193[system.l2c] 1194type=BaseCache 1195children=tags 1196addr_ranges=0:18446744073709551615 1197assoc=8 1198clk_domain=system.cpu_clk_domain |
| 1199demand_mshr_reserve=1 |
|
| 1193eventq_index=0 1194forward_snoops=true 1195hit_latency=20 1196is_top_level=false 1197max_miss_count=0 1198mshrs=20 1199prefetch_on_access=false 1200prefetcher=Null --- 18 unchanged lines hidden (view full) --- 1219sequential_access=false 1220size=4194304 1221 1222[system.membus] 1223type=CoherentXBar 1224children=badaddr_responder 1225clk_domain=system.clk_domain 1226eventq_index=0 | 1200eventq_index=0 1201forward_snoops=true 1202hit_latency=20 1203is_top_level=false 1204max_miss_count=0 1205mshrs=20 1206prefetch_on_access=false 1207prefetcher=Null --- 18 unchanged lines hidden (view full) --- 1226sequential_access=false 1227size=4194304 1228 1229[system.membus] 1230type=CoherentXBar 1231children=badaddr_responder 1232clk_domain=system.clk_domain 1233eventq_index=0 |
| 1227header_cycles=1 | 1234forward_latency=4 1235frontend_latency=3 1236response_latency=2 |
| 1228snoop_filter=Null | 1237snoop_filter=Null |
| 1238snoop_response_latency=4 |
|
| 1229system=system 1230use_default_range=false | 1239system=system 1240use_default_range=false |
| 1231width=8 | 1241width=16 |
| 1232default=system.membus.badaddr_responder.pio 1233master=system.bridge.slave system.physmem.port 1234slave=system.system_port system.l2c.mem_side system.iocache.mem_side 1235 1236[system.membus.badaddr_responder] 1237type=IsaFake 1238clk_domain=system.clk_domain 1239eventq_index=0 --- 33 unchanged lines hidden (view full) --- 1273IDD4W2=0.000000 1274IDD5=0.220000 1275IDD52=0.000000 1276IDD6=0.000000 1277IDD62=0.000000 1278VDD=1.500000 1279VDD2=0.000000 1280activation_limit=4 | 1242default=system.membus.badaddr_responder.pio 1243master=system.bridge.slave system.physmem.port 1244slave=system.system_port system.l2c.mem_side system.iocache.mem_side 1245 1246[system.membus.badaddr_responder] 1247type=IsaFake 1248clk_domain=system.clk_domain 1249eventq_index=0 --- 33 unchanged lines hidden (view full) --- 1283IDD4W2=0.000000 1284IDD5=0.220000 1285IDD52=0.000000 1286IDD6=0.000000 1287IDD62=0.000000 1288VDD=1.500000 1289VDD2=0.000000 1290activation_limit=4 |
| 1281addr_mapping=RoRaBaChCo | 1291addr_mapping=RoRaBaCoCh |
| 1282bank_groups_per_rank=0 1283banks_per_rank=8 1284burst_length=8 1285channels=1 1286clk_domain=system.clk_domain 1287conf_table_reported=true 1288device_bus_width=8 1289device_rowbuffer_size=1024 --- 43 unchanged lines hidden (view full) --- 1333children=disk 1334disk=system.simple_disk.disk 1335eventq_index=0 1336system=system 1337 1338[system.simple_disk.disk] 1339type=RawDiskImage 1340eventq_index=0 | 1292bank_groups_per_rank=0 1293banks_per_rank=8 1294burst_length=8 1295channels=1 1296clk_domain=system.clk_domain 1297conf_table_reported=true 1298device_bus_width=8 1299device_rowbuffer_size=1024 --- 43 unchanged lines hidden (view full) --- 1343children=disk 1344disk=system.simple_disk.disk 1345eventq_index=0 1346system=system 1347 1348[system.simple_disk.disk] 1349type=RawDiskImage 1350eventq_index=0 |
| 1341image_file=/dist/disks/linux-latest.img | 1351image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img |
| 1342read_only=true 1343 1344[system.terminal] 1345type=Terminal 1346eventq_index=0 1347intr_control=system.intrctrl 1348number=0 1349output=true 1350port=3456 1351 1352[system.toL2Bus] 1353type=CoherentXBar 1354clk_domain=system.cpu_clk_domain 1355eventq_index=0 | 1352read_only=true 1353 1354[system.terminal] 1355type=Terminal 1356eventq_index=0 1357intr_control=system.intrctrl 1358number=0 1359output=true 1360port=3456 1361 1362[system.toL2Bus] 1363type=CoherentXBar 1364clk_domain=system.cpu_clk_domain 1365eventq_index=0 |
| 1356header_cycles=1 | 1366forward_latency=0 1367frontend_latency=1 1368response_latency=1 |
| 1357snoop_filter=Null | 1369snoop_filter=Null |
| 1370snoop_response_latency=1 |
|
| 1358system=system 1359use_default_range=false | 1371system=system 1372use_default_range=false |
| 1360width=8 | 1373width=32 |
| 1361master=system.l2c.cpu_side 1362slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 1363 1364[system.tsunami] 1365type=Tsunami 1366children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 1367eventq_index=0 1368intrctrl=system.intrctrl --- 622 unchanged lines hidden --- | 1374master=system.l2c.cpu_side 1375slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 1376 1377[system.tsunami] 1378type=Tsunami 1379children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 1380eventq_index=0 1381intrctrl=system.intrctrl --- 622 unchanged lines hidden --- |