1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxAlphaSystem
13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
14boot_cpu_frequency=500
15boot_osflags=root=/dev/hda1 console=ttyS0
16cache_line_size=64
17clk_domain=system.clk_domain
18console=/arm/projectscratch/randd/systems/dist/binaries/console
19default_p_state=UNDEFINED
20eventq_index=0
21exit_on_work_items=false
22init_param=0
23kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux
24kernel_addr_check=true
25load_addr_mask=1099511627775
26load_offset=0
27mem_mode=timing
28mem_ranges=0:134217727
29memories=system.physmem
30mmap_using_noreserve=false
31multi_thread=false
32num_work_ids=16
33p_state_clk_gate_bins=20
34p_state_clk_gate_max=1000000000000
35p_state_clk_gate_min=1000
36pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal
37power_model=Null
38readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
39symbolfile=
40system_rev=1024
41system_type=34
42thermal_components=
43thermal_model=Null
44work_begin_ckpt_count=0
45work_begin_cpu_id_exit=-1
46work_begin_exit_count=0
47work_cpus_ckpt_count=0
48work_end_ckpt_count=0
49work_end_exit_count=0
50work_item_id=-1
51system_port=system.membus.slave[0]
52
53[system.bridge]
54type=Bridge
55clk_domain=system.clk_domain
56default_p_state=UNDEFINED
57delay=50000
58eventq_index=0
59p_state_clk_gate_bins=20
60p_state_clk_gate_max=1000000000000
61p_state_clk_gate_min=1000
62power_model=Null
63ranges=8796093022208:18446744073709551615
64req_size=16
65resp_size=16
66master=system.iobus.slave[0]
67slave=system.membus.master[0]
68
69[system.clk_domain]
70type=SrcClockDomain
--- 9 unchanged lines hidden (view full) ---
80branchPred=system.cpu.branchPred
81checker=Null
82clk_domain=system.cpu_clk_domain
83cpu_id=0
84decodeCycleInput=true
85decodeInputBufferSize=3
86decodeInputWidth=2
87decodeToExecuteForwardDelay=1
88default_p_state=UNDEFINED
89do_checkpoint_insts=true
90do_quiesce=true
91do_statistics_insts=true
92dtb=system.cpu.dtb
93enableIdling=true
94eventq_index=0
95executeAllowEarlyMemoryIssue=true
96executeBranchDelay=1
--- 26 unchanged lines hidden (view full) ---
123interrupts=system.cpu.interrupts
124isa=system.cpu.isa
125itb=system.cpu.itb
126max_insts_all_threads=0
127max_insts_any_thread=0
128max_loads_all_threads=0
129max_loads_any_thread=0
130numThreads=1
131p_state_clk_gate_bins=20
132p_state_clk_gate_max=1000000000000
133p_state_clk_gate_min=1000
134power_model=Null
135profile=0
136progress_interval=0
137simpoint_start_insts=
138socket_id=0
139switched_out=false
140system=system
141threadPolicy=RoundRobin
142tracer=system.cpu.tracer
143workload=
144dcache_port=system.cpu.dcache.cpu_side
145icache_port=system.cpu.icache.cpu_side
146
147[system.cpu.branchPred]
148type=TournamentBP
149BTBEntries=4096
150BTBTagSize=16
151RASSize=16
152choiceCtrBits=2
153choicePredictorSize=8192
154eventq_index=0
155globalCtrBits=2
156globalPredictorSize=8192
157indirectHashGHR=true
158indirectHashTargets=true
159indirectPathLength=3
160indirectSets=256
161indirectTagSize=16
162indirectWays=2
163instShiftAmt=2
164localCtrBits=2
165localHistoryTableSize=2048
166localPredictorSize=2048
167numThreads=1
168useIndirect=true
169
170[system.cpu.dcache]
171type=Cache
172children=tags
173addr_ranges=0:18446744073709551615
174assoc=4
175clk_domain=system.cpu_clk_domain
176clusivity=mostly_incl
177default_p_state=UNDEFINED
178demand_mshr_reserve=1
179eventq_index=0
180hit_latency=2
181is_read_only=false
182max_miss_count=0
183mshrs=4
184p_state_clk_gate_bins=20
185p_state_clk_gate_max=1000000000000
186p_state_clk_gate_min=1000
187power_model=Null
188prefetch_on_access=false
189prefetcher=Null
190response_latency=2
191sequential_access=false
192size=32768
193system=system
194tags=system.cpu.dcache.tags
195tgts_per_mshr=20
196write_buffers=8
197writeback_clean=false
198cpu_side=system.cpu.dcache_port
199mem_side=system.cpu.toL2Bus.slave[1]
200
201[system.cpu.dcache.tags]
202type=LRU
203assoc=4
204block_size=64
205clk_domain=system.cpu_clk_domain
206default_p_state=UNDEFINED
207eventq_index=0
208hit_latency=2
209p_state_clk_gate_bins=20
210p_state_clk_gate_max=1000000000000
211p_state_clk_gate_min=1000
212power_model=Null
213sequential_access=false
214size=32768
215
216[system.cpu.dtb]
217type=AlphaTLB
218eventq_index=0
219size=64
220
--- 382 unchanged lines hidden (view full) ---
603
604[system.cpu.icache]
605type=Cache
606children=tags
607addr_ranges=0:18446744073709551615
608assoc=1
609clk_domain=system.cpu_clk_domain
610clusivity=mostly_incl
611default_p_state=UNDEFINED
612demand_mshr_reserve=1
613eventq_index=0
614hit_latency=2
615is_read_only=true
616max_miss_count=0
617mshrs=4
618p_state_clk_gate_bins=20
619p_state_clk_gate_max=1000000000000
620p_state_clk_gate_min=1000
621power_model=Null
622prefetch_on_access=false
623prefetcher=Null
624response_latency=2
625sequential_access=false
626size=32768
627system=system
628tags=system.cpu.icache.tags
629tgts_per_mshr=20
630write_buffers=8
631writeback_clean=true
632cpu_side=system.cpu.icache_port
633mem_side=system.cpu.toL2Bus.slave[0]
634
635[system.cpu.icache.tags]
636type=LRU
637assoc=1
638block_size=64
639clk_domain=system.cpu_clk_domain
640default_p_state=UNDEFINED
641eventq_index=0
642hit_latency=2
643p_state_clk_gate_bins=20
644p_state_clk_gate_max=1000000000000
645p_state_clk_gate_min=1000
646power_model=Null
647sequential_access=false
648size=32768
649
650[system.cpu.interrupts]
651type=AlphaInterrupts
652eventq_index=0
653
654[system.cpu.isa]
--- 8 unchanged lines hidden (view full) ---
663
664[system.cpu.l2cache]
665type=Cache
666children=tags
667addr_ranges=0:18446744073709551615
668assoc=8
669clk_domain=system.cpu_clk_domain
670clusivity=mostly_incl
671default_p_state=UNDEFINED
672demand_mshr_reserve=1
673eventq_index=0
674hit_latency=20
675is_read_only=false
676max_miss_count=0
677mshrs=20
678p_state_clk_gate_bins=20
679p_state_clk_gate_max=1000000000000
680p_state_clk_gate_min=1000
681power_model=Null
682prefetch_on_access=false
683prefetcher=Null
684response_latency=20
685sequential_access=false
686size=4194304
687system=system
688tags=system.cpu.l2cache.tags
689tgts_per_mshr=12
690write_buffers=8
691writeback_clean=false
692cpu_side=system.cpu.toL2Bus.master[0]
693mem_side=system.membus.slave[1]
694
695[system.cpu.l2cache.tags]
696type=LRU
697assoc=8
698block_size=64
699clk_domain=system.cpu_clk_domain
700default_p_state=UNDEFINED
701eventq_index=0
702hit_latency=20
703p_state_clk_gate_bins=20
704p_state_clk_gate_max=1000000000000
705p_state_clk_gate_min=1000
706power_model=Null
707sequential_access=false
708size=4194304
709
710[system.cpu.toL2Bus]
711type=CoherentXBar
712children=snoop_filter
713clk_domain=system.cpu_clk_domain
714default_p_state=UNDEFINED
715eventq_index=0
716forward_latency=0
717frontend_latency=1
718p_state_clk_gate_bins=20
719p_state_clk_gate_max=1000000000000
720p_state_clk_gate_min=1000
721point_of_coherency=false
722power_model=Null
723response_latency=1
724snoop_filter=system.cpu.toL2Bus.snoop_filter
725snoop_response_latency=1
726system=system
727use_default_range=false
728width=32
729master=system.cpu.l2cache.cpu_side
730slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
--- 32 unchanged lines hidden (view full) ---
763eventq_index=0
764image_file=
765read_only=false
766table_size=65536
767
768[system.disk0.image.child]
769type=RawDiskImage
770eventq_index=0
771image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
772read_only=true
773
774[system.disk2]
775type=IdeDisk
776children=image
777delay=1000000
778driveID=master
779eventq_index=0
--- 6 unchanged lines hidden (view full) ---
786eventq_index=0
787image_file=
788read_only=false
789table_size=65536
790
791[system.disk2.image.child]
792type=RawDiskImage
793eventq_index=0
794image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img
795read_only=true
796
797[system.dvfs_handler]
798type=DVFSHandler
799domains=
800enable=false
801eventq_index=0
802sys_clk_domain=system.clk_domain
803transition_latency=100000000
804
805[system.intrctrl]
806type=IntrControl
807eventq_index=0
808sys=system
809
810[system.iobus]
811type=NoncoherentXBar
812clk_domain=system.clk_domain
813default_p_state=UNDEFINED
814eventq_index=0
815forward_latency=1
816frontend_latency=2
817p_state_clk_gate_bins=20
818p_state_clk_gate_max=1000000000000
819p_state_clk_gate_min=1000
820power_model=Null
821response_latency=2
822use_default_range=false
823width=16
824master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side
825slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
826
827[system.iocache]
828type=Cache
829children=tags
830addr_ranges=0:134217727
831assoc=8
832clk_domain=system.clk_domain
833clusivity=mostly_incl
834default_p_state=UNDEFINED
835demand_mshr_reserve=1
836eventq_index=0
837hit_latency=50
838is_read_only=false
839max_miss_count=0
840mshrs=20
841p_state_clk_gate_bins=20
842p_state_clk_gate_max=1000000000000
843p_state_clk_gate_min=1000
844power_model=Null
845prefetch_on_access=false
846prefetcher=Null
847response_latency=50
848sequential_access=false
849size=1024
850system=system
851tags=system.iocache.tags
852tgts_per_mshr=12
853write_buffers=8
854writeback_clean=false
855cpu_side=system.iobus.master[27]
856mem_side=system.membus.slave[2]
857
858[system.iocache.tags]
859type=LRU
860assoc=8
861block_size=64
862clk_domain=system.clk_domain
863default_p_state=UNDEFINED
864eventq_index=0
865hit_latency=50
866p_state_clk_gate_bins=20
867p_state_clk_gate_max=1000000000000
868p_state_clk_gate_min=1000
869power_model=Null
870sequential_access=false
871size=1024
872
873[system.membus]
874type=CoherentXBar
875children=badaddr_responder
876clk_domain=system.clk_domain
877default_p_state=UNDEFINED
878eventq_index=0
879forward_latency=4
880frontend_latency=3
881p_state_clk_gate_bins=20
882p_state_clk_gate_max=1000000000000
883p_state_clk_gate_min=1000
884point_of_coherency=true
885power_model=Null
886response_latency=2
887snoop_filter=Null
888snoop_response_latency=4
889system=system
890use_default_range=false
891width=16
892default=system.membus.badaddr_responder.pio
893master=system.bridge.slave system.physmem.port
894slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
895
896[system.membus.badaddr_responder]
897type=IsaFake
898clk_domain=system.clk_domain
899default_p_state=UNDEFINED
900eventq_index=0
901fake_mem=false
902p_state_clk_gate_bins=20
903p_state_clk_gate_max=1000000000000
904p_state_clk_gate_min=1000
905pio_addr=0
906pio_latency=100000
907pio_size=8
908power_model=Null
909ret_bad_addr=true
910ret_data16=65535
911ret_data32=4294967295
912ret_data64=18446744073709551615
913ret_data8=255
914system=system
915update_data=false
916warn_access=
--- 28 unchanged lines hidden (view full) ---
945activation_limit=4
946addr_mapping=RoRaBaCoCh
947bank_groups_per_rank=0
948banks_per_rank=8
949burst_length=8
950channels=1
951clk_domain=system.clk_domain
952conf_table_reported=true
953default_p_state=UNDEFINED
954device_bus_width=8
955device_rowbuffer_size=1024
956device_size=536870912
957devices_per_rank=8
958dll=true
959eventq_index=0
960in_addr_map=true
961max_accesses_per_row=16
962mem_sched_policy=frfcfs
963min_writes_per_switch=16
964null=false
965p_state_clk_gate_bins=20
966p_state_clk_gate_max=1000000000000
967p_state_clk_gate_min=1000
968page_policy=open_adaptive
969power_model=Null
970range=0:134217727
971ranks_per_channel=2
972read_buffer_size=32
973static_backend_latency=10000
974static_frontend_latency=10000
975tBURST=5000
976tCCD_L=0
977tCK=1250
--- 25 unchanged lines hidden (view full) ---
1003children=disk
1004disk=system.simple_disk.disk
1005eventq_index=0
1006system=system
1007
1008[system.simple_disk.disk]
1009type=RawDiskImage
1010eventq_index=0
1011image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
1012read_only=true
1013
1014[system.terminal]
1015type=Terminal
1016eventq_index=0
1017intr_control=system.intrctrl
1018number=0
1019output=true
--- 5 unchanged lines hidden (view full) ---
1025eventq_index=0
1026intrctrl=system.intrctrl
1027system=system
1028
1029[system.tsunami.backdoor]
1030type=AlphaBackdoor
1031clk_domain=system.clk_domain
1032cpu=system.cpu
1033default_p_state=UNDEFINED
1034disk=system.simple_disk
1035eventq_index=0
1036p_state_clk_gate_bins=20
1037p_state_clk_gate_max=1000000000000
1038p_state_clk_gate_min=1000
1039pio_addr=8804682956800
1040pio_latency=100000
1041platform=system.tsunami
1042power_model=Null
1043system=system
1044terminal=system.terminal
1045pio=system.iobus.master[24]
1046
1047[system.tsunami.cchip]
1048type=TsunamiCChip
1049clk_domain=system.clk_domain
1050default_p_state=UNDEFINED
1051eventq_index=0
1052p_state_clk_gate_bins=20
1053p_state_clk_gate_max=1000000000000
1054p_state_clk_gate_min=1000
1055pio_addr=8803072344064
1056pio_latency=100000
1057power_model=Null
1058system=system
1059tsunami=system.tsunami
1060pio=system.iobus.master[0]
1061
1062[system.tsunami.ethernet]
1063type=NSGigE
1064BAR0=1
1065BAR0LegacyIO=false
--- 64 unchanged lines hidden (view full) ---
1130Revision=0
1131Status=656
1132SubClassCode=0
1133SubsystemID=0
1134SubsystemVendorID=0
1135VendorID=4107
1136clk_domain=system.clk_domain
1137config_latency=20000
1138default_p_state=UNDEFINED
1139dma_data_free=false
1140dma_desc_free=false
1141dma_no_allocate=true
1142dma_read_delay=0
1143dma_read_factor=0
1144dma_write_delay=0
1145dma_write_factor=0
1146eventq_index=0
1147hardware_address=00:90:00:00:00:01
1148host=system.tsunami.pchip
1149intr_delay=10000000
1150p_state_clk_gate_bins=20
1151p_state_clk_gate_max=1000000000000
1152p_state_clk_gate_min=1000
1153pci_bus=0
1154pci_dev=1
1155pci_func=0
1156pio_latency=30000
1157power_model=Null
1158rss=false
1159rx_delay=1000000
1160rx_fifo_size=524288
1161rx_filter=true
1162rx_thread=false
1163system=system
1164tx_delay=1000000
1165tx_fifo_size=524288
1166tx_thread=false
1167dma=system.iobus.slave[2]
1168pio=system.iobus.master[26]
1169
1170[system.tsunami.fake_OROM]
1171type=IsaFake
1172clk_domain=system.clk_domain
1173default_p_state=UNDEFINED
1174eventq_index=0
1175fake_mem=false
1176p_state_clk_gate_bins=20
1177p_state_clk_gate_max=1000000000000
1178p_state_clk_gate_min=1000
1179pio_addr=8796093677568
1180pio_latency=100000
1181pio_size=393216
1182power_model=Null
1183ret_bad_addr=false
1184ret_data16=65535
1185ret_data32=4294967295
1186ret_data64=18446744073709551615
1187ret_data8=255
1188system=system
1189update_data=false
1190warn_access=
1191pio=system.iobus.master[8]
1192
1193[system.tsunami.fake_ata0]
1194type=IsaFake
1195clk_domain=system.clk_domain
1196default_p_state=UNDEFINED
1197eventq_index=0
1198fake_mem=false
1199p_state_clk_gate_bins=20
1200p_state_clk_gate_max=1000000000000
1201p_state_clk_gate_min=1000
1202pio_addr=8804615848432
1203pio_latency=100000
1204pio_size=8
1205power_model=Null
1206ret_bad_addr=false
1207ret_data16=65535
1208ret_data32=4294967295
1209ret_data64=18446744073709551615
1210ret_data8=255
1211system=system
1212update_data=false
1213warn_access=
1214pio=system.iobus.master[19]
1215
1216[system.tsunami.fake_ata1]
1217type=IsaFake
1218clk_domain=system.clk_domain
1219default_p_state=UNDEFINED
1220eventq_index=0
1221fake_mem=false
1222p_state_clk_gate_bins=20
1223p_state_clk_gate_max=1000000000000
1224p_state_clk_gate_min=1000
1225pio_addr=8804615848304
1226pio_latency=100000
1227pio_size=8
1228power_model=Null
1229ret_bad_addr=false
1230ret_data16=65535
1231ret_data32=4294967295
1232ret_data64=18446744073709551615
1233ret_data8=255
1234system=system
1235update_data=false
1236warn_access=
1237pio=system.iobus.master[20]
1238
1239[system.tsunami.fake_pnp_addr]
1240type=IsaFake
1241clk_domain=system.clk_domain
1242default_p_state=UNDEFINED
1243eventq_index=0
1244fake_mem=false
1245p_state_clk_gate_bins=20
1246p_state_clk_gate_max=1000000000000
1247p_state_clk_gate_min=1000
1248pio_addr=8804615848569
1249pio_latency=100000
1250pio_size=8
1251power_model=Null
1252ret_bad_addr=false
1253ret_data16=65535
1254ret_data32=4294967295
1255ret_data64=18446744073709551615
1256ret_data8=255
1257system=system
1258update_data=false
1259warn_access=
1260pio=system.iobus.master[9]
1261
1262[system.tsunami.fake_pnp_read0]
1263type=IsaFake
1264clk_domain=system.clk_domain
1265default_p_state=UNDEFINED
1266eventq_index=0
1267fake_mem=false
1268p_state_clk_gate_bins=20
1269p_state_clk_gate_max=1000000000000
1270p_state_clk_gate_min=1000
1271pio_addr=8804615848451
1272pio_latency=100000
1273pio_size=8
1274power_model=Null
1275ret_bad_addr=false
1276ret_data16=65535
1277ret_data32=4294967295
1278ret_data64=18446744073709551615
1279ret_data8=255
1280system=system
1281update_data=false
1282warn_access=
1283pio=system.iobus.master[11]
1284
1285[system.tsunami.fake_pnp_read1]
1286type=IsaFake
1287clk_domain=system.clk_domain
1288default_p_state=UNDEFINED
1289eventq_index=0
1290fake_mem=false
1291p_state_clk_gate_bins=20
1292p_state_clk_gate_max=1000000000000
1293p_state_clk_gate_min=1000
1294pio_addr=8804615848515
1295pio_latency=100000
1296pio_size=8
1297power_model=Null
1298ret_bad_addr=false
1299ret_data16=65535
1300ret_data32=4294967295
1301ret_data64=18446744073709551615
1302ret_data8=255
1303system=system
1304update_data=false
1305warn_access=
1306pio=system.iobus.master[12]
1307
1308[system.tsunami.fake_pnp_read2]
1309type=IsaFake
1310clk_domain=system.clk_domain
1311default_p_state=UNDEFINED
1312eventq_index=0
1313fake_mem=false
1314p_state_clk_gate_bins=20
1315p_state_clk_gate_max=1000000000000
1316p_state_clk_gate_min=1000
1317pio_addr=8804615848579
1318pio_latency=100000
1319pio_size=8
1320power_model=Null
1321ret_bad_addr=false
1322ret_data16=65535
1323ret_data32=4294967295
1324ret_data64=18446744073709551615
1325ret_data8=255
1326system=system
1327update_data=false
1328warn_access=
1329pio=system.iobus.master[13]
1330
1331[system.tsunami.fake_pnp_read3]
1332type=IsaFake
1333clk_domain=system.clk_domain
1334default_p_state=UNDEFINED
1335eventq_index=0
1336fake_mem=false
1337p_state_clk_gate_bins=20
1338p_state_clk_gate_max=1000000000000
1339p_state_clk_gate_min=1000
1340pio_addr=8804615848643
1341pio_latency=100000
1342pio_size=8
1343power_model=Null
1344ret_bad_addr=false
1345ret_data16=65535
1346ret_data32=4294967295
1347ret_data64=18446744073709551615
1348ret_data8=255
1349system=system
1350update_data=false
1351warn_access=
1352pio=system.iobus.master[14]
1353
1354[system.tsunami.fake_pnp_read4]
1355type=IsaFake
1356clk_domain=system.clk_domain
1357default_p_state=UNDEFINED
1358eventq_index=0
1359fake_mem=false
1360p_state_clk_gate_bins=20
1361p_state_clk_gate_max=1000000000000
1362p_state_clk_gate_min=1000
1363pio_addr=8804615848707
1364pio_latency=100000
1365pio_size=8
1366power_model=Null
1367ret_bad_addr=false
1368ret_data16=65535
1369ret_data32=4294967295
1370ret_data64=18446744073709551615
1371ret_data8=255
1372system=system
1373update_data=false
1374warn_access=
1375pio=system.iobus.master[15]
1376
1377[system.tsunami.fake_pnp_read5]
1378type=IsaFake
1379clk_domain=system.clk_domain
1380default_p_state=UNDEFINED
1381eventq_index=0
1382fake_mem=false
1383p_state_clk_gate_bins=20
1384p_state_clk_gate_max=1000000000000
1385p_state_clk_gate_min=1000
1386pio_addr=8804615848771
1387pio_latency=100000
1388pio_size=8
1389power_model=Null
1390ret_bad_addr=false
1391ret_data16=65535
1392ret_data32=4294967295
1393ret_data64=18446744073709551615
1394ret_data8=255
1395system=system
1396update_data=false
1397warn_access=
1398pio=system.iobus.master[16]
1399
1400[system.tsunami.fake_pnp_read6]
1401type=IsaFake
1402clk_domain=system.clk_domain
1403default_p_state=UNDEFINED
1404eventq_index=0
1405fake_mem=false
1406p_state_clk_gate_bins=20
1407p_state_clk_gate_max=1000000000000
1408p_state_clk_gate_min=1000
1409pio_addr=8804615848835
1410pio_latency=100000
1411pio_size=8
1412power_model=Null
1413ret_bad_addr=false
1414ret_data16=65535
1415ret_data32=4294967295
1416ret_data64=18446744073709551615
1417ret_data8=255
1418system=system
1419update_data=false
1420warn_access=
1421pio=system.iobus.master[17]
1422
1423[system.tsunami.fake_pnp_read7]
1424type=IsaFake
1425clk_domain=system.clk_domain
1426default_p_state=UNDEFINED
1427eventq_index=0
1428fake_mem=false
1429p_state_clk_gate_bins=20
1430p_state_clk_gate_max=1000000000000
1431p_state_clk_gate_min=1000
1432pio_addr=8804615848899
1433pio_latency=100000
1434pio_size=8
1435power_model=Null
1436ret_bad_addr=false
1437ret_data16=65535
1438ret_data32=4294967295
1439ret_data64=18446744073709551615
1440ret_data8=255
1441system=system
1442update_data=false
1443warn_access=
1444pio=system.iobus.master[18]
1445
1446[system.tsunami.fake_pnp_write]
1447type=IsaFake
1448clk_domain=system.clk_domain
1449default_p_state=UNDEFINED
1450eventq_index=0
1451fake_mem=false
1452p_state_clk_gate_bins=20
1453p_state_clk_gate_max=1000000000000
1454p_state_clk_gate_min=1000
1455pio_addr=8804615850617
1456pio_latency=100000
1457pio_size=8
1458power_model=Null
1459ret_bad_addr=false
1460ret_data16=65535
1461ret_data32=4294967295
1462ret_data64=18446744073709551615
1463ret_data8=255
1464system=system
1465update_data=false
1466warn_access=
1467pio=system.iobus.master[10]
1468
1469[system.tsunami.fake_ppc]
1470type=IsaFake
1471clk_domain=system.clk_domain
1472default_p_state=UNDEFINED
1473eventq_index=0
1474fake_mem=false
1475p_state_clk_gate_bins=20
1476p_state_clk_gate_max=1000000000000
1477p_state_clk_gate_min=1000
1478pio_addr=8804615848891
1479pio_latency=100000
1480pio_size=8
1481power_model=Null
1482ret_bad_addr=false
1483ret_data16=65535
1484ret_data32=4294967295
1485ret_data64=18446744073709551615
1486ret_data8=255
1487system=system
1488update_data=false
1489warn_access=
1490pio=system.iobus.master[7]
1491
1492[system.tsunami.fake_sm_chip]
1493type=IsaFake
1494clk_domain=system.clk_domain
1495default_p_state=UNDEFINED
1496eventq_index=0
1497fake_mem=false
1498p_state_clk_gate_bins=20
1499p_state_clk_gate_max=1000000000000
1500p_state_clk_gate_min=1000
1501pio_addr=8804615848816
1502pio_latency=100000
1503pio_size=8
1504power_model=Null
1505ret_bad_addr=false
1506ret_data16=65535
1507ret_data32=4294967295
1508ret_data64=18446744073709551615
1509ret_data8=255
1510system=system
1511update_data=false
1512warn_access=
1513pio=system.iobus.master[2]
1514
1515[system.tsunami.fake_uart1]
1516type=IsaFake
1517clk_domain=system.clk_domain
1518default_p_state=UNDEFINED
1519eventq_index=0
1520fake_mem=false
1521p_state_clk_gate_bins=20
1522p_state_clk_gate_max=1000000000000
1523p_state_clk_gate_min=1000
1524pio_addr=8804615848696
1525pio_latency=100000
1526pio_size=8
1527power_model=Null
1528ret_bad_addr=false
1529ret_data16=65535
1530ret_data32=4294967295
1531ret_data64=18446744073709551615
1532ret_data8=255
1533system=system
1534update_data=false
1535warn_access=
1536pio=system.iobus.master[3]
1537
1538[system.tsunami.fake_uart2]
1539type=IsaFake
1540clk_domain=system.clk_domain
1541default_p_state=UNDEFINED
1542eventq_index=0
1543fake_mem=false
1544p_state_clk_gate_bins=20
1545p_state_clk_gate_max=1000000000000
1546p_state_clk_gate_min=1000
1547pio_addr=8804615848936
1548pio_latency=100000
1549pio_size=8
1550power_model=Null
1551ret_bad_addr=false
1552ret_data16=65535
1553ret_data32=4294967295
1554ret_data64=18446744073709551615
1555ret_data8=255
1556system=system
1557update_data=false
1558warn_access=
1559pio=system.iobus.master[4]
1560
1561[system.tsunami.fake_uart3]
1562type=IsaFake
1563clk_domain=system.clk_domain
1564default_p_state=UNDEFINED
1565eventq_index=0
1566fake_mem=false
1567p_state_clk_gate_bins=20
1568p_state_clk_gate_max=1000000000000
1569p_state_clk_gate_min=1000
1570pio_addr=8804615848680
1571pio_latency=100000
1572pio_size=8
1573power_model=Null
1574ret_bad_addr=false
1575ret_data16=65535
1576ret_data32=4294967295
1577ret_data64=18446744073709551615
1578ret_data8=255
1579system=system
1580update_data=false
1581warn_access=
1582pio=system.iobus.master[5]
1583
1584[system.tsunami.fake_uart4]
1585type=IsaFake
1586clk_domain=system.clk_domain
1587default_p_state=UNDEFINED
1588eventq_index=0
1589fake_mem=false
1590p_state_clk_gate_bins=20
1591p_state_clk_gate_max=1000000000000
1592p_state_clk_gate_min=1000
1593pio_addr=8804615848944
1594pio_latency=100000
1595pio_size=8
1596power_model=Null
1597ret_bad_addr=false
1598ret_data16=65535
1599ret_data32=4294967295
1600ret_data64=18446744073709551615
1601ret_data8=255
1602system=system
1603update_data=false
1604warn_access=
1605pio=system.iobus.master[6]
1606
1607[system.tsunami.fb]
1608type=BadDevice
1609clk_domain=system.clk_domain
1610default_p_state=UNDEFINED
1611devicename=FrameBuffer
1612eventq_index=0
1613p_state_clk_gate_bins=20
1614p_state_clk_gate_max=1000000000000
1615p_state_clk_gate_min=1000
1616pio_addr=8804615848912
1617pio_latency=100000
1618power_model=Null
1619system=system
1620pio=system.iobus.master[21]
1621
1622[system.tsunami.ide]
1623type=IdeController
1624BAR0=1
1625BAR0LegacyIO=false
1626BAR0Size=8
--- 64 unchanged lines hidden (view full) ---
1691Status=640
1692SubClassCode=1
1693SubsystemID=0
1694SubsystemVendorID=0
1695VendorID=32902
1696clk_domain=system.clk_domain
1697config_latency=20000
1698ctrl_offset=0
1699default_p_state=UNDEFINED
1700disks=system.disk0 system.disk2
1701eventq_index=0
1702host=system.tsunami.pchip
1703io_shift=0
1704p_state_clk_gate_bins=20
1705p_state_clk_gate_max=1000000000000
1706p_state_clk_gate_min=1000
1707pci_bus=0
1708pci_dev=0
1709pci_func=0
1710pio_latency=30000
1711power_model=Null
1712system=system
1713dma=system.iobus.slave[1]
1714pio=system.iobus.master[25]
1715
1716[system.tsunami.io]
1717type=TsunamiIO
1718clk_domain=system.clk_domain
1719default_p_state=UNDEFINED
1720eventq_index=0
1721frequency=976562500
1722p_state_clk_gate_bins=20
1723p_state_clk_gate_max=1000000000000
1724p_state_clk_gate_min=1000
1725pio_addr=8804615847936
1726pio_latency=100000
1727power_model=Null
1728system=system
1729time=Thu Jan 1 00:00:00 2009
1730tsunami=system.tsunami
1731year_is_bcd=false
1732pio=system.iobus.master[22]
1733
1734[system.tsunami.pchip]
1735type=TsunamiPChip
1736clk_domain=system.clk_domain
1737conf_base=8804649402368
1738conf_device_bits=8
1739conf_size=16777216
1740default_p_state=UNDEFINED
1741eventq_index=0
1742p_state_clk_gate_bins=20
1743p_state_clk_gate_max=1000000000000
1744p_state_clk_gate_min=1000
1745pci_dma_base=0
1746pci_mem_base=8796093022208
1747pci_pio_base=8804615847936
1748pio_addr=8802535473152
1749pio_latency=100000
1750platform=system.tsunami
1751power_model=Null
1752system=system
1753tsunami=system.tsunami
1754pio=system.iobus.master[1]
1755
1756[system.tsunami.uart]
1757type=Uart8250
1758clk_domain=system.clk_domain
1759default_p_state=UNDEFINED
1760eventq_index=0
1761p_state_clk_gate_bins=20
1762p_state_clk_gate_max=1000000000000
1763p_state_clk_gate_min=1000
1764pio_addr=8804615848952
1765pio_latency=100000
1766platform=system.tsunami
1767power_model=Null
1768system=system
1769terminal=system.terminal
1770pio=system.iobus.master[23]
1771
1772[system.voltage_domain]
1773type=VoltageDomain
1774eventq_index=0
1775voltage=1.000000
1776
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxAlphaSystem
13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
14boot_cpu_frequency=500
15boot_osflags=root=/dev/hda1 console=ttyS0
16cache_line_size=64
17clk_domain=system.clk_domain
18console=/arm/projectscratch/randd/systems/dist/binaries/console
19default_p_state=UNDEFINED
20eventq_index=0
21exit_on_work_items=false
22init_param=0
23kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux
24kernel_addr_check=true
25load_addr_mask=1099511627775
26load_offset=0
27mem_mode=timing
28mem_ranges=0:134217727
29memories=system.physmem
30mmap_using_noreserve=false
31multi_thread=false
32num_work_ids=16
33p_state_clk_gate_bins=20
34p_state_clk_gate_max=1000000000000
35p_state_clk_gate_min=1000
36pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal
37power_model=Null
38readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
39symbolfile=
40system_rev=1024
41system_type=34
42thermal_components=
43thermal_model=Null
44work_begin_ckpt_count=0
45work_begin_cpu_id_exit=-1
46work_begin_exit_count=0
47work_cpus_ckpt_count=0
48work_end_ckpt_count=0
49work_end_exit_count=0
50work_item_id=-1
51system_port=system.membus.slave[0]
52
53[system.bridge]
54type=Bridge
55clk_domain=system.clk_domain
56default_p_state=UNDEFINED
57delay=50000
58eventq_index=0
59p_state_clk_gate_bins=20
60p_state_clk_gate_max=1000000000000
61p_state_clk_gate_min=1000
62power_model=Null
63ranges=8796093022208:18446744073709551615
64req_size=16
65resp_size=16
66master=system.iobus.slave[0]
67slave=system.membus.master[0]
68
69[system.clk_domain]
70type=SrcClockDomain
--- 9 unchanged lines hidden (view full) ---
80branchPred=system.cpu.branchPred
81checker=Null
82clk_domain=system.cpu_clk_domain
83cpu_id=0
84decodeCycleInput=true
85decodeInputBufferSize=3
86decodeInputWidth=2
87decodeToExecuteForwardDelay=1
88default_p_state=UNDEFINED
89do_checkpoint_insts=true
90do_quiesce=true
91do_statistics_insts=true
92dtb=system.cpu.dtb
93enableIdling=true
94eventq_index=0
95executeAllowEarlyMemoryIssue=true
96executeBranchDelay=1
--- 26 unchanged lines hidden (view full) ---
123interrupts=system.cpu.interrupts
124isa=system.cpu.isa
125itb=system.cpu.itb
126max_insts_all_threads=0
127max_insts_any_thread=0
128max_loads_all_threads=0
129max_loads_any_thread=0
130numThreads=1
131p_state_clk_gate_bins=20
132p_state_clk_gate_max=1000000000000
133p_state_clk_gate_min=1000
134power_model=Null
135profile=0
136progress_interval=0
137simpoint_start_insts=
138socket_id=0
139switched_out=false
140system=system
141threadPolicy=RoundRobin
142tracer=system.cpu.tracer
143workload=
144dcache_port=system.cpu.dcache.cpu_side
145icache_port=system.cpu.icache.cpu_side
146
147[system.cpu.branchPred]
148type=TournamentBP
149BTBEntries=4096
150BTBTagSize=16
151RASSize=16
152choiceCtrBits=2
153choicePredictorSize=8192
154eventq_index=0
155globalCtrBits=2
156globalPredictorSize=8192
157indirectHashGHR=true
158indirectHashTargets=true
159indirectPathLength=3
160indirectSets=256
161indirectTagSize=16
162indirectWays=2
163instShiftAmt=2
164localCtrBits=2
165localHistoryTableSize=2048
166localPredictorSize=2048
167numThreads=1
168useIndirect=true
169
170[system.cpu.dcache]
171type=Cache
172children=tags
173addr_ranges=0:18446744073709551615
174assoc=4
175clk_domain=system.cpu_clk_domain
176clusivity=mostly_incl
177default_p_state=UNDEFINED
178demand_mshr_reserve=1
179eventq_index=0
180hit_latency=2
181is_read_only=false
182max_miss_count=0
183mshrs=4
184p_state_clk_gate_bins=20
185p_state_clk_gate_max=1000000000000
186p_state_clk_gate_min=1000
187power_model=Null
188prefetch_on_access=false
189prefetcher=Null
190response_latency=2
191sequential_access=false
192size=32768
193system=system
194tags=system.cpu.dcache.tags
195tgts_per_mshr=20
196write_buffers=8
197writeback_clean=false
198cpu_side=system.cpu.dcache_port
199mem_side=system.cpu.toL2Bus.slave[1]
200
201[system.cpu.dcache.tags]
202type=LRU
203assoc=4
204block_size=64
205clk_domain=system.cpu_clk_domain
206default_p_state=UNDEFINED
207eventq_index=0
208hit_latency=2
209p_state_clk_gate_bins=20
210p_state_clk_gate_max=1000000000000
211p_state_clk_gate_min=1000
212power_model=Null
213sequential_access=false
214size=32768
215
216[system.cpu.dtb]
217type=AlphaTLB
218eventq_index=0
219size=64
220
--- 382 unchanged lines hidden (view full) ---
603
604[system.cpu.icache]
605type=Cache
606children=tags
607addr_ranges=0:18446744073709551615
608assoc=1
609clk_domain=system.cpu_clk_domain
610clusivity=mostly_incl
611default_p_state=UNDEFINED
612demand_mshr_reserve=1
613eventq_index=0
614hit_latency=2
615is_read_only=true
616max_miss_count=0
617mshrs=4
618p_state_clk_gate_bins=20
619p_state_clk_gate_max=1000000000000
620p_state_clk_gate_min=1000
621power_model=Null
622prefetch_on_access=false
623prefetcher=Null
624response_latency=2
625sequential_access=false
626size=32768
627system=system
628tags=system.cpu.icache.tags
629tgts_per_mshr=20
630write_buffers=8
631writeback_clean=true
632cpu_side=system.cpu.icache_port
633mem_side=system.cpu.toL2Bus.slave[0]
634
635[system.cpu.icache.tags]
636type=LRU
637assoc=1
638block_size=64
639clk_domain=system.cpu_clk_domain
640default_p_state=UNDEFINED
641eventq_index=0
642hit_latency=2
643p_state_clk_gate_bins=20
644p_state_clk_gate_max=1000000000000
645p_state_clk_gate_min=1000
646power_model=Null
647sequential_access=false
648size=32768
649
650[system.cpu.interrupts]
651type=AlphaInterrupts
652eventq_index=0
653
654[system.cpu.isa]
--- 8 unchanged lines hidden (view full) ---
663
664[system.cpu.l2cache]
665type=Cache
666children=tags
667addr_ranges=0:18446744073709551615
668assoc=8
669clk_domain=system.cpu_clk_domain
670clusivity=mostly_incl
671default_p_state=UNDEFINED
672demand_mshr_reserve=1
673eventq_index=0
674hit_latency=20
675is_read_only=false
676max_miss_count=0
677mshrs=20
678p_state_clk_gate_bins=20
679p_state_clk_gate_max=1000000000000
680p_state_clk_gate_min=1000
681power_model=Null
682prefetch_on_access=false
683prefetcher=Null
684response_latency=20
685sequential_access=false
686size=4194304
687system=system
688tags=system.cpu.l2cache.tags
689tgts_per_mshr=12
690write_buffers=8
691writeback_clean=false
692cpu_side=system.cpu.toL2Bus.master[0]
693mem_side=system.membus.slave[1]
694
695[system.cpu.l2cache.tags]
696type=LRU
697assoc=8
698block_size=64
699clk_domain=system.cpu_clk_domain
700default_p_state=UNDEFINED
701eventq_index=0
702hit_latency=20
703p_state_clk_gate_bins=20
704p_state_clk_gate_max=1000000000000
705p_state_clk_gate_min=1000
706power_model=Null
707sequential_access=false
708size=4194304
709
710[system.cpu.toL2Bus]
711type=CoherentXBar
712children=snoop_filter
713clk_domain=system.cpu_clk_domain
714default_p_state=UNDEFINED
715eventq_index=0
716forward_latency=0
717frontend_latency=1
718p_state_clk_gate_bins=20
719p_state_clk_gate_max=1000000000000
720p_state_clk_gate_min=1000
721point_of_coherency=false
722power_model=Null
723response_latency=1
724snoop_filter=system.cpu.toL2Bus.snoop_filter
725snoop_response_latency=1
726system=system
727use_default_range=false
728width=32
729master=system.cpu.l2cache.cpu_side
730slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
--- 32 unchanged lines hidden (view full) ---
763eventq_index=0
764image_file=
765read_only=false
766table_size=65536
767
768[system.disk0.image.child]
769type=RawDiskImage
770eventq_index=0
771image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
772read_only=true
773
774[system.disk2]
775type=IdeDisk
776children=image
777delay=1000000
778driveID=master
779eventq_index=0
--- 6 unchanged lines hidden (view full) ---
786eventq_index=0
787image_file=
788read_only=false
789table_size=65536
790
791[system.disk2.image.child]
792type=RawDiskImage
793eventq_index=0
794image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img
795read_only=true
796
797[system.dvfs_handler]
798type=DVFSHandler
799domains=
800enable=false
801eventq_index=0
802sys_clk_domain=system.clk_domain
803transition_latency=100000000
804
805[system.intrctrl]
806type=IntrControl
807eventq_index=0
808sys=system
809
810[system.iobus]
811type=NoncoherentXBar
812clk_domain=system.clk_domain
813default_p_state=UNDEFINED
814eventq_index=0
815forward_latency=1
816frontend_latency=2
817p_state_clk_gate_bins=20
818p_state_clk_gate_max=1000000000000
819p_state_clk_gate_min=1000
820power_model=Null
821response_latency=2
822use_default_range=false
823width=16
824master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side
825slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
826
827[system.iocache]
828type=Cache
829children=tags
830addr_ranges=0:134217727
831assoc=8
832clk_domain=system.clk_domain
833clusivity=mostly_incl
834default_p_state=UNDEFINED
835demand_mshr_reserve=1
836eventq_index=0
837hit_latency=50
838is_read_only=false
839max_miss_count=0
840mshrs=20
841p_state_clk_gate_bins=20
842p_state_clk_gate_max=1000000000000
843p_state_clk_gate_min=1000
844power_model=Null
845prefetch_on_access=false
846prefetcher=Null
847response_latency=50
848sequential_access=false
849size=1024
850system=system
851tags=system.iocache.tags
852tgts_per_mshr=12
853write_buffers=8
854writeback_clean=false
855cpu_side=system.iobus.master[27]
856mem_side=system.membus.slave[2]
857
858[system.iocache.tags]
859type=LRU
860assoc=8
861block_size=64
862clk_domain=system.clk_domain
863default_p_state=UNDEFINED
864eventq_index=0
865hit_latency=50
866p_state_clk_gate_bins=20
867p_state_clk_gate_max=1000000000000
868p_state_clk_gate_min=1000
869power_model=Null
870sequential_access=false
871size=1024
872
873[system.membus]
874type=CoherentXBar
875children=badaddr_responder
876clk_domain=system.clk_domain
877default_p_state=UNDEFINED
878eventq_index=0
879forward_latency=4
880frontend_latency=3
881p_state_clk_gate_bins=20
882p_state_clk_gate_max=1000000000000
883p_state_clk_gate_min=1000
884point_of_coherency=true
885power_model=Null
886response_latency=2
887snoop_filter=Null
888snoop_response_latency=4
889system=system
890use_default_range=false
891width=16
892default=system.membus.badaddr_responder.pio
893master=system.bridge.slave system.physmem.port
894slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
895
896[system.membus.badaddr_responder]
897type=IsaFake
898clk_domain=system.clk_domain
899default_p_state=UNDEFINED
900eventq_index=0
901fake_mem=false
902p_state_clk_gate_bins=20
903p_state_clk_gate_max=1000000000000
904p_state_clk_gate_min=1000
905pio_addr=0
906pio_latency=100000
907pio_size=8
908power_model=Null
909ret_bad_addr=true
910ret_data16=65535
911ret_data32=4294967295
912ret_data64=18446744073709551615
913ret_data8=255
914system=system
915update_data=false
916warn_access=
--- 28 unchanged lines hidden (view full) ---
945activation_limit=4
946addr_mapping=RoRaBaCoCh
947bank_groups_per_rank=0
948banks_per_rank=8
949burst_length=8
950channels=1
951clk_domain=system.clk_domain
952conf_table_reported=true
953default_p_state=UNDEFINED
954device_bus_width=8
955device_rowbuffer_size=1024
956device_size=536870912
957devices_per_rank=8
958dll=true
959eventq_index=0
960in_addr_map=true
961max_accesses_per_row=16
962mem_sched_policy=frfcfs
963min_writes_per_switch=16
964null=false
965p_state_clk_gate_bins=20
966p_state_clk_gate_max=1000000000000
967p_state_clk_gate_min=1000
968page_policy=open_adaptive
969power_model=Null
970range=0:134217727
971ranks_per_channel=2
972read_buffer_size=32
973static_backend_latency=10000
974static_frontend_latency=10000
975tBURST=5000
976tCCD_L=0
977tCK=1250
--- 25 unchanged lines hidden (view full) ---
1003children=disk
1004disk=system.simple_disk.disk
1005eventq_index=0
1006system=system
1007
1008[system.simple_disk.disk]
1009type=RawDiskImage
1010eventq_index=0
1011image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
1012read_only=true
1013
1014[system.terminal]
1015type=Terminal
1016eventq_index=0
1017intr_control=system.intrctrl
1018number=0
1019output=true
--- 5 unchanged lines hidden (view full) ---
1025eventq_index=0
1026intrctrl=system.intrctrl
1027system=system
1028
1029[system.tsunami.backdoor]
1030type=AlphaBackdoor
1031clk_domain=system.clk_domain
1032cpu=system.cpu
1033default_p_state=UNDEFINED
1034disk=system.simple_disk
1035eventq_index=0
1036p_state_clk_gate_bins=20
1037p_state_clk_gate_max=1000000000000
1038p_state_clk_gate_min=1000
1039pio_addr=8804682956800
1040pio_latency=100000
1041platform=system.tsunami
1042power_model=Null
1043system=system
1044terminal=system.terminal
1045pio=system.iobus.master[24]
1046
1047[system.tsunami.cchip]
1048type=TsunamiCChip
1049clk_domain=system.clk_domain
1050default_p_state=UNDEFINED
1051eventq_index=0
1052p_state_clk_gate_bins=20
1053p_state_clk_gate_max=1000000000000
1054p_state_clk_gate_min=1000
1055pio_addr=8803072344064
1056pio_latency=100000
1057power_model=Null
1058system=system
1059tsunami=system.tsunami
1060pio=system.iobus.master[0]
1061
1062[system.tsunami.ethernet]
1063type=NSGigE
1064BAR0=1
1065BAR0LegacyIO=false
--- 64 unchanged lines hidden (view full) ---
1130Revision=0
1131Status=656
1132SubClassCode=0
1133SubsystemID=0
1134SubsystemVendorID=0
1135VendorID=4107
1136clk_domain=system.clk_domain
1137config_latency=20000
1138default_p_state=UNDEFINED
1139dma_data_free=false
1140dma_desc_free=false
1141dma_no_allocate=true
1142dma_read_delay=0
1143dma_read_factor=0
1144dma_write_delay=0
1145dma_write_factor=0
1146eventq_index=0
1147hardware_address=00:90:00:00:00:01
1148host=system.tsunami.pchip
1149intr_delay=10000000
1150p_state_clk_gate_bins=20
1151p_state_clk_gate_max=1000000000000
1152p_state_clk_gate_min=1000
1153pci_bus=0
1154pci_dev=1
1155pci_func=0
1156pio_latency=30000
1157power_model=Null
1158rss=false
1159rx_delay=1000000
1160rx_fifo_size=524288
1161rx_filter=true
1162rx_thread=false
1163system=system
1164tx_delay=1000000
1165tx_fifo_size=524288
1166tx_thread=false
1167dma=system.iobus.slave[2]
1168pio=system.iobus.master[26]
1169
1170[system.tsunami.fake_OROM]
1171type=IsaFake
1172clk_domain=system.clk_domain
1173default_p_state=UNDEFINED
1174eventq_index=0
1175fake_mem=false
1176p_state_clk_gate_bins=20
1177p_state_clk_gate_max=1000000000000
1178p_state_clk_gate_min=1000
1179pio_addr=8796093677568
1180pio_latency=100000
1181pio_size=393216
1182power_model=Null
1183ret_bad_addr=false
1184ret_data16=65535
1185ret_data32=4294967295
1186ret_data64=18446744073709551615
1187ret_data8=255
1188system=system
1189update_data=false
1190warn_access=
1191pio=system.iobus.master[8]
1192
1193[system.tsunami.fake_ata0]
1194type=IsaFake
1195clk_domain=system.clk_domain
1196default_p_state=UNDEFINED
1197eventq_index=0
1198fake_mem=false
1199p_state_clk_gate_bins=20
1200p_state_clk_gate_max=1000000000000
1201p_state_clk_gate_min=1000
1202pio_addr=8804615848432
1203pio_latency=100000
1204pio_size=8
1205power_model=Null
1206ret_bad_addr=false
1207ret_data16=65535
1208ret_data32=4294967295
1209ret_data64=18446744073709551615
1210ret_data8=255
1211system=system
1212update_data=false
1213warn_access=
1214pio=system.iobus.master[19]
1215
1216[system.tsunami.fake_ata1]
1217type=IsaFake
1218clk_domain=system.clk_domain
1219default_p_state=UNDEFINED
1220eventq_index=0
1221fake_mem=false
1222p_state_clk_gate_bins=20
1223p_state_clk_gate_max=1000000000000
1224p_state_clk_gate_min=1000
1225pio_addr=8804615848304
1226pio_latency=100000
1227pio_size=8
1228power_model=Null
1229ret_bad_addr=false
1230ret_data16=65535
1231ret_data32=4294967295
1232ret_data64=18446744073709551615
1233ret_data8=255
1234system=system
1235update_data=false
1236warn_access=
1237pio=system.iobus.master[20]
1238
1239[system.tsunami.fake_pnp_addr]
1240type=IsaFake
1241clk_domain=system.clk_domain
1242default_p_state=UNDEFINED
1243eventq_index=0
1244fake_mem=false
1245p_state_clk_gate_bins=20
1246p_state_clk_gate_max=1000000000000
1247p_state_clk_gate_min=1000
1248pio_addr=8804615848569
1249pio_latency=100000
1250pio_size=8
1251power_model=Null
1252ret_bad_addr=false
1253ret_data16=65535
1254ret_data32=4294967295
1255ret_data64=18446744073709551615
1256ret_data8=255
1257system=system
1258update_data=false
1259warn_access=
1260pio=system.iobus.master[9]
1261
1262[system.tsunami.fake_pnp_read0]
1263type=IsaFake
1264clk_domain=system.clk_domain
1265default_p_state=UNDEFINED
1266eventq_index=0
1267fake_mem=false
1268p_state_clk_gate_bins=20
1269p_state_clk_gate_max=1000000000000
1270p_state_clk_gate_min=1000
1271pio_addr=8804615848451
1272pio_latency=100000
1273pio_size=8
1274power_model=Null
1275ret_bad_addr=false
1276ret_data16=65535
1277ret_data32=4294967295
1278ret_data64=18446744073709551615
1279ret_data8=255
1280system=system
1281update_data=false
1282warn_access=
1283pio=system.iobus.master[11]
1284
1285[system.tsunami.fake_pnp_read1]
1286type=IsaFake
1287clk_domain=system.clk_domain
1288default_p_state=UNDEFINED
1289eventq_index=0
1290fake_mem=false
1291p_state_clk_gate_bins=20
1292p_state_clk_gate_max=1000000000000
1293p_state_clk_gate_min=1000
1294pio_addr=8804615848515
1295pio_latency=100000
1296pio_size=8
1297power_model=Null
1298ret_bad_addr=false
1299ret_data16=65535
1300ret_data32=4294967295
1301ret_data64=18446744073709551615
1302ret_data8=255
1303system=system
1304update_data=false
1305warn_access=
1306pio=system.iobus.master[12]
1307
1308[system.tsunami.fake_pnp_read2]
1309type=IsaFake
1310clk_domain=system.clk_domain
1311default_p_state=UNDEFINED
1312eventq_index=0
1313fake_mem=false
1314p_state_clk_gate_bins=20
1315p_state_clk_gate_max=1000000000000
1316p_state_clk_gate_min=1000
1317pio_addr=8804615848579
1318pio_latency=100000
1319pio_size=8
1320power_model=Null
1321ret_bad_addr=false
1322ret_data16=65535
1323ret_data32=4294967295
1324ret_data64=18446744073709551615
1325ret_data8=255
1326system=system
1327update_data=false
1328warn_access=
1329pio=system.iobus.master[13]
1330
1331[system.tsunami.fake_pnp_read3]
1332type=IsaFake
1333clk_domain=system.clk_domain
1334default_p_state=UNDEFINED
1335eventq_index=0
1336fake_mem=false
1337p_state_clk_gate_bins=20
1338p_state_clk_gate_max=1000000000000
1339p_state_clk_gate_min=1000
1340pio_addr=8804615848643
1341pio_latency=100000
1342pio_size=8
1343power_model=Null
1344ret_bad_addr=false
1345ret_data16=65535
1346ret_data32=4294967295
1347ret_data64=18446744073709551615
1348ret_data8=255
1349system=system
1350update_data=false
1351warn_access=
1352pio=system.iobus.master[14]
1353
1354[system.tsunami.fake_pnp_read4]
1355type=IsaFake
1356clk_domain=system.clk_domain
1357default_p_state=UNDEFINED
1358eventq_index=0
1359fake_mem=false
1360p_state_clk_gate_bins=20
1361p_state_clk_gate_max=1000000000000
1362p_state_clk_gate_min=1000
1363pio_addr=8804615848707
1364pio_latency=100000
1365pio_size=8
1366power_model=Null
1367ret_bad_addr=false
1368ret_data16=65535
1369ret_data32=4294967295
1370ret_data64=18446744073709551615
1371ret_data8=255
1372system=system
1373update_data=false
1374warn_access=
1375pio=system.iobus.master[15]
1376
1377[system.tsunami.fake_pnp_read5]
1378type=IsaFake
1379clk_domain=system.clk_domain
1380default_p_state=UNDEFINED
1381eventq_index=0
1382fake_mem=false
1383p_state_clk_gate_bins=20
1384p_state_clk_gate_max=1000000000000
1385p_state_clk_gate_min=1000
1386pio_addr=8804615848771
1387pio_latency=100000
1388pio_size=8
1389power_model=Null
1390ret_bad_addr=false
1391ret_data16=65535
1392ret_data32=4294967295
1393ret_data64=18446744073709551615
1394ret_data8=255
1395system=system
1396update_data=false
1397warn_access=
1398pio=system.iobus.master[16]
1399
1400[system.tsunami.fake_pnp_read6]
1401type=IsaFake
1402clk_domain=system.clk_domain
1403default_p_state=UNDEFINED
1404eventq_index=0
1405fake_mem=false
1406p_state_clk_gate_bins=20
1407p_state_clk_gate_max=1000000000000
1408p_state_clk_gate_min=1000
1409pio_addr=8804615848835
1410pio_latency=100000
1411pio_size=8
1412power_model=Null
1413ret_bad_addr=false
1414ret_data16=65535
1415ret_data32=4294967295
1416ret_data64=18446744073709551615
1417ret_data8=255
1418system=system
1419update_data=false
1420warn_access=
1421pio=system.iobus.master[17]
1422
1423[system.tsunami.fake_pnp_read7]
1424type=IsaFake
1425clk_domain=system.clk_domain
1426default_p_state=UNDEFINED
1427eventq_index=0
1428fake_mem=false
1429p_state_clk_gate_bins=20
1430p_state_clk_gate_max=1000000000000
1431p_state_clk_gate_min=1000
1432pio_addr=8804615848899
1433pio_latency=100000
1434pio_size=8
1435power_model=Null
1436ret_bad_addr=false
1437ret_data16=65535
1438ret_data32=4294967295
1439ret_data64=18446744073709551615
1440ret_data8=255
1441system=system
1442update_data=false
1443warn_access=
1444pio=system.iobus.master[18]
1445
1446[system.tsunami.fake_pnp_write]
1447type=IsaFake
1448clk_domain=system.clk_domain
1449default_p_state=UNDEFINED
1450eventq_index=0
1451fake_mem=false
1452p_state_clk_gate_bins=20
1453p_state_clk_gate_max=1000000000000
1454p_state_clk_gate_min=1000
1455pio_addr=8804615850617
1456pio_latency=100000
1457pio_size=8
1458power_model=Null
1459ret_bad_addr=false
1460ret_data16=65535
1461ret_data32=4294967295
1462ret_data64=18446744073709551615
1463ret_data8=255
1464system=system
1465update_data=false
1466warn_access=
1467pio=system.iobus.master[10]
1468
1469[system.tsunami.fake_ppc]
1470type=IsaFake
1471clk_domain=system.clk_domain
1472default_p_state=UNDEFINED
1473eventq_index=0
1474fake_mem=false
1475p_state_clk_gate_bins=20
1476p_state_clk_gate_max=1000000000000
1477p_state_clk_gate_min=1000
1478pio_addr=8804615848891
1479pio_latency=100000
1480pio_size=8
1481power_model=Null
1482ret_bad_addr=false
1483ret_data16=65535
1484ret_data32=4294967295
1485ret_data64=18446744073709551615
1486ret_data8=255
1487system=system
1488update_data=false
1489warn_access=
1490pio=system.iobus.master[7]
1491
1492[system.tsunami.fake_sm_chip]
1493type=IsaFake
1494clk_domain=system.clk_domain
1495default_p_state=UNDEFINED
1496eventq_index=0
1497fake_mem=false
1498p_state_clk_gate_bins=20
1499p_state_clk_gate_max=1000000000000
1500p_state_clk_gate_min=1000
1501pio_addr=8804615848816
1502pio_latency=100000
1503pio_size=8
1504power_model=Null
1505ret_bad_addr=false
1506ret_data16=65535
1507ret_data32=4294967295
1508ret_data64=18446744073709551615
1509ret_data8=255
1510system=system
1511update_data=false
1512warn_access=
1513pio=system.iobus.master[2]
1514
1515[system.tsunami.fake_uart1]
1516type=IsaFake
1517clk_domain=system.clk_domain
1518default_p_state=UNDEFINED
1519eventq_index=0
1520fake_mem=false
1521p_state_clk_gate_bins=20
1522p_state_clk_gate_max=1000000000000
1523p_state_clk_gate_min=1000
1524pio_addr=8804615848696
1525pio_latency=100000
1526pio_size=8
1527power_model=Null
1528ret_bad_addr=false
1529ret_data16=65535
1530ret_data32=4294967295
1531ret_data64=18446744073709551615
1532ret_data8=255
1533system=system
1534update_data=false
1535warn_access=
1536pio=system.iobus.master[3]
1537
1538[system.tsunami.fake_uart2]
1539type=IsaFake
1540clk_domain=system.clk_domain
1541default_p_state=UNDEFINED
1542eventq_index=0
1543fake_mem=false
1544p_state_clk_gate_bins=20
1545p_state_clk_gate_max=1000000000000
1546p_state_clk_gate_min=1000
1547pio_addr=8804615848936
1548pio_latency=100000
1549pio_size=8
1550power_model=Null
1551ret_bad_addr=false
1552ret_data16=65535
1553ret_data32=4294967295
1554ret_data64=18446744073709551615
1555ret_data8=255
1556system=system
1557update_data=false
1558warn_access=
1559pio=system.iobus.master[4]
1560
1561[system.tsunami.fake_uart3]
1562type=IsaFake
1563clk_domain=system.clk_domain
1564default_p_state=UNDEFINED
1565eventq_index=0
1566fake_mem=false
1567p_state_clk_gate_bins=20
1568p_state_clk_gate_max=1000000000000
1569p_state_clk_gate_min=1000
1570pio_addr=8804615848680
1571pio_latency=100000
1572pio_size=8
1573power_model=Null
1574ret_bad_addr=false
1575ret_data16=65535
1576ret_data32=4294967295
1577ret_data64=18446744073709551615
1578ret_data8=255
1579system=system
1580update_data=false
1581warn_access=
1582pio=system.iobus.master[5]
1583
1584[system.tsunami.fake_uart4]
1585type=IsaFake
1586clk_domain=system.clk_domain
1587default_p_state=UNDEFINED
1588eventq_index=0
1589fake_mem=false
1590p_state_clk_gate_bins=20
1591p_state_clk_gate_max=1000000000000
1592p_state_clk_gate_min=1000
1593pio_addr=8804615848944
1594pio_latency=100000
1595pio_size=8
1596power_model=Null
1597ret_bad_addr=false
1598ret_data16=65535
1599ret_data32=4294967295
1600ret_data64=18446744073709551615
1601ret_data8=255
1602system=system
1603update_data=false
1604warn_access=
1605pio=system.iobus.master[6]
1606
1607[system.tsunami.fb]
1608type=BadDevice
1609clk_domain=system.clk_domain
1610default_p_state=UNDEFINED
1611devicename=FrameBuffer
1612eventq_index=0
1613p_state_clk_gate_bins=20
1614p_state_clk_gate_max=1000000000000
1615p_state_clk_gate_min=1000
1616pio_addr=8804615848912
1617pio_latency=100000
1618power_model=Null
1619system=system
1620pio=system.iobus.master[21]
1621
1622[system.tsunami.ide]
1623type=IdeController
1624BAR0=1
1625BAR0LegacyIO=false
1626BAR0Size=8
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1691Status=640
1692SubClassCode=1
1693SubsystemID=0
1694SubsystemVendorID=0
1695VendorID=32902
1696clk_domain=system.clk_domain
1697config_latency=20000
1698ctrl_offset=0
1699default_p_state=UNDEFINED
1700disks=system.disk0 system.disk2
1701eventq_index=0
1702host=system.tsunami.pchip
1703io_shift=0
1704p_state_clk_gate_bins=20
1705p_state_clk_gate_max=1000000000000
1706p_state_clk_gate_min=1000
1707pci_bus=0
1708pci_dev=0
1709pci_func=0
1710pio_latency=30000
1711power_model=Null
1712system=system
1713dma=system.iobus.slave[1]
1714pio=system.iobus.master[25]
1715
1716[system.tsunami.io]
1717type=TsunamiIO
1718clk_domain=system.clk_domain
1719default_p_state=UNDEFINED
1720eventq_index=0
1721frequency=976562500
1722p_state_clk_gate_bins=20
1723p_state_clk_gate_max=1000000000000
1724p_state_clk_gate_min=1000
1725pio_addr=8804615847936
1726pio_latency=100000
1727power_model=Null
1728system=system
1729time=Thu Jan 1 00:00:00 2009
1730tsunami=system.tsunami
1731year_is_bcd=false
1732pio=system.iobus.master[22]
1733
1734[system.tsunami.pchip]
1735type=TsunamiPChip
1736clk_domain=system.clk_domain
1737conf_base=8804649402368
1738conf_device_bits=8
1739conf_size=16777216
1740default_p_state=UNDEFINED
1741eventq_index=0
1742p_state_clk_gate_bins=20
1743p_state_clk_gate_max=1000000000000
1744p_state_clk_gate_min=1000
1745pci_dma_base=0
1746pci_mem_base=8796093022208
1747pci_pio_base=8804615847936
1748pio_addr=8802535473152
1749pio_latency=100000
1750platform=system.tsunami
1751power_model=Null
1752system=system
1753tsunami=system.tsunami
1754pio=system.iobus.master[1]
1755
1756[system.tsunami.uart]
1757type=Uart8250
1758clk_domain=system.clk_domain
1759default_p_state=UNDEFINED
1760eventq_index=0
1761p_state_clk_gate_bins=20
1762p_state_clk_gate_max=1000000000000
1763p_state_clk_gate_min=1000
1764pio_addr=8804615848952
1765pio_latency=100000
1766platform=system.tsunami
1767power_model=Null
1768system=system
1769terminal=system.terminal
1770pio=system.iobus.master[23]
1771
1772[system.voltage_domain]
1773type=VoltageDomain
1774eventq_index=0
1775voltage=1.000000
1776