tsunami-o3.py (8631:8c038d4cd210) tsunami-o3.py (8713:2f1a3e335255)
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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71#cpu
72cpu = DerivO3CPU(cpu_id=0)
73#the system
74system = FSConfig.makeLinuxAlphaSystem('timing')
75
76system.cpu = cpu
77#create the l1/l2 bus
78system.toL2Bus = Bus()
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 62 unchanged lines hidden (view full) ---

71#cpu
72cpu = DerivO3CPU(cpu_id=0)
73#the system
74system = FSConfig.makeLinuxAlphaSystem('timing')
75
76system.cpu = cpu
77#create the l1/l2 bus
78system.toL2Bus = Bus()
79system.bridge.filter_ranges_a=[AddrRange(0, Addr.max)]
80system.bridge.filter_ranges_b=[AddrRange(0, size='8GB')]
81system.iocache = IOCache()
82system.iocache.cpu_side = system.iobus.port
83system.iocache.mem_side = system.membus.port
84
85
86#connect up the l2 cache
87system.l2c = L2(size='4MB', assoc=8)
88system.l2c.cpu_side = system.toL2Bus.port

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79system.iocache = IOCache()
80system.iocache.cpu_side = system.iobus.port
81system.iocache.mem_side = system.membus.port
82
83
84#connect up the l2 cache
85system.l2c = L2(size='4MB', assoc=8)
86system.l2c.cpu_side = system.toL2Bus.port

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