tsunami-o3-dual.py (8883:c92153af04ac) tsunami-o3-dual.py (9036:6385cf85bf12)
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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70
71#cpu
72cpus = [ DerivO3CPU(cpu_id=i) for i in xrange(2) ]
73#the system
74system = FSConfig.makeLinuxAlphaSystem('timing')
75
76system.cpu = cpus
77#create the l1/l2 bus
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 61 unchanged lines hidden (view full) ---

70
71#cpu
72cpus = [ DerivO3CPU(cpu_id=i) for i in xrange(2) ]
73#the system
74system = FSConfig.makeLinuxAlphaSystem('timing')
75
76system.cpu = cpus
77#create the l1/l2 bus
78system.toL2Bus = Bus()
78system.toL2Bus = CoherentBus()
79system.iocache = IOCache()
80system.iocache.cpu_side = system.iobus.master
81system.iocache.mem_side = system.membus.slave
82
83
84#connect up the l2 cache
85system.l2c = L2(size='4MB', assoc=8)
86system.l2c.cpu_side = system.toL2Bus.master

--- 15 unchanged lines hidden --- 		79system.iocache = IOCache()
80system.iocache.cpu_side = system.iobus.master
81system.iocache.mem_side = system.membus.slave
82
83
84#connect up the l2 cache
85system.l2c = L2(size='4MB', assoc=8)
86system.l2c.cpu_side = system.toL2Bus.master

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