tgen-simple-mem.py (9398:6a348f61220c) tgen-simple-mem.py (9402:f6e3c60f04e5)
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Andreas Hansson
37
38import m5
39from m5.objects import *
40
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 24 unchanged lines hidden (view full) ---

33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Andreas Hansson
37
38import m5
39from m5.objects import *
40
41# both traffic generator and communication monitor are only available
42# if we have protobuf support, so potentially skip this test
43require_sim_object("TrafficGen")
44require_sim_object("CommMonitor")
45
41# even if this is only a traffic generator, call it cpu to make sure
42# the scripts are happy
43cpu = TrafficGen(config_file = "tests/quick/se/70.tgen/tgen-simple-mem.cfg")
44
45# system simulated
46system = System(cpu = cpu, physmem = SimpleMemory(),
47 membus = NoncoherentBus(clock="1GHz", width = 16))
48

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46# even if this is only a traffic generator, call it cpu to make sure
47# the scripts are happy
48cpu = TrafficGen(config_file = "tests/quick/se/70.tgen/tgen-simple-mem.cfg")
49
50# system simulated
51system = System(cpu = cpu, physmem = SimpleMemory(),
52 membus = NoncoherentBus(clock="1GHz", width = 16))
53

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