| t1000-simple-atomic.py (8882:87cafa076695) | t1000-simple-atomic.py (9680:217bdd9a3ad9) |
|---|---|
| 1# Copyright (c) 2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 18 unchanged lines hidden (view full) --- 27# Authors: Ali Saidi 28 29import m5 30from m5.objects import * 31m5.util.addToPath('../configs/common') 32import FSConfig 33 34cpu = AtomicSimpleCPU(cpu_id=0) | 1# Copyright (c) 2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 18 unchanged lines hidden (view full) --- 27# Authors: Ali Saidi 28 29import m5 30from m5.objects import * 31m5.util.addToPath('../configs/common') 32import FSConfig 33 34cpu = AtomicSimpleCPU(cpu_id=0) |
| 35system = FSConfig.makeSparcSystem('atomic') | 35system = FSConfig.makeSparcSystem('atomic', SimpleDDR3) |
| 36system.cpu = cpu 37# create the interrupt controller 38cpu.createInterruptController() 39cpu.connectAllPorts(system.membus) 40 41root = Root(full_system=True, system=system) 42 43m5.ticks.setGlobalFrequency('2GHz') | 36system.cpu = cpu 37# create the interrupt controller 38cpu.createInterruptController() 39cpu.connectAllPorts(system.membus) 40 41root = Root(full_system=True, system=system) 42 43m5.ticks.setGlobalFrequency('2GHz') |