1# Copyright (c) 2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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26#
27# Authors: Ali Saidi
28
29import m5
30from m5.objects import *
31m5.util.addToPath('../configs/common')
32import FSConfig
33
34try:
35 system = FSConfig.makeSparcSystem('atomic')
36except IOError as e:
37 skip_test(reason=str(e))
38
39system.voltage_domain = VoltageDomain()
40system.clk_domain = SrcClockDomain(clock = '1GHz',
41 voltage_domain = system.voltage_domain)
42system.cpu_clk_domain = SrcClockDomain(clock = '1GHz',
43 voltage_domain = system.voltage_domain)
44cpu = AtomicSimpleCPU(cpu_id=0, clk_domain = system.cpu_clk_domain)
45system.cpu = cpu
46# create the interrupt controller

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