| simple-timing-ruby.py (8802:ef66a9083bc4) | simple-timing-ruby.py (8808:8af87554ad7e) |
|---|---|
| 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 67 unchanged lines hidden (view full) --- 76assert(len(system.ruby._cpu_ruby_ports) == 1) 77 78# 79# Tie the cpu cache ports to the ruby cpu ports and 80# physmem, respectively 81# 82cpu.connectAllPorts(system.ruby._cpu_ruby_ports[0]) 83 | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 67 unchanged lines hidden (view full) --- 76assert(len(system.ruby._cpu_ruby_ports) == 1) 77 78# 79# Tie the cpu cache ports to the ruby cpu ports and 80# physmem, respectively 81# 82cpu.connectAllPorts(system.ruby._cpu_ruby_ports[0]) 83 |
| 84# Connect the system port for loading of binaries etc 85system.system_port = system.ruby._sys_port_proxy.port 86 | |
| 87# ----------------------- 88# run simulation 89# ----------------------- 90 91root = Root(full_system = False, system = system) 92root.system.mem_mode = 'timing' 93 94# Not much point in this being higher than the L1 latency 95m5.ticks.setGlobalFrequency('1ns') | 84# ----------------------- 85# run simulation 86# ----------------------- 87 88root = Root(full_system = False, system = system) 89root.system.mem_mode = 'timing' 90 91# Not much point in this being higher than the L1 latency 92m5.ticks.setGlobalFrequency('1ns') |