1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright 9# notice, this list of conditions and the following disclaimer in the 10# documentation and/or other materials provided with the distribution; 11# neither the name of the copyright holders nor the names of its 12# contributors may be used to endorse or promote products derived from 13# this software without specific prior written permission. 14# 15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26# 27# Authors: Ron Dreslinski 28 29import m5 30from m5.objects import * 31from m5.defines import buildEnv 32from m5.util import addToPath 33import os, optparse, sys 34 35if buildEnv['FULL_SYSTEM']: 36 panic("This script requires system-emulation mode (*_SE).") 37 38# Get paths we might need 39config_path = os.path.dirname(os.path.abspath(__file__)) 40config_root = os.path.dirname(config_path) 41m5_root = os.path.dirname(config_root) 42addToPath(config_root+'/configs/common') 43addToPath(config_root+'/configs/ruby')
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44addToPath(config_root+'/configs/ruby/protocols')
45addToPath(config_root+'/configs/ruby/topologies')
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44 45import Ruby 46 47parser = optparse.OptionParser() 48 49#
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52# Set the default cache size and associativity to be very small to encourage
53# races between requests and writebacks.
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50# Add the ruby specific and protocol specific options |
51#
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55parser.add_option("--l1d_size", type="string", default="256B")
56parser.add_option("--l1i_size", type="string", default="256B")
57parser.add_option("--l2_size", type="string", default="512B")
58parser.add_option("--l1d_assoc", type="int", default=2)
59parser.add_option("--l1i_assoc", type="int", default=2)
60parser.add_option("--l2_assoc", type="int", default=2)
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52Ruby.define_options(parser) |
53 54execfile(os.path.join(config_root, "configs/common", "Options.py")) 55 56(options, args) = parser.parse_args() 57
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58# 59# Set the default cache size and associativity to be very small to encourage 60# races between requests and writebacks. 61# 62options.l1d_size="256B" 63options.l1i_size="256B" 64options.l2_size="512B" 65options.l3_size="1kB" 66options.l1d_assoc=2 67options.l1i_assoc=2 68options.l2_assoc=2 69options.l3_assoc=2 70 |
71nb_cores = 4 72cpus = [ TimingSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ] 73 74# overwrite the num_cpus to equal nb_cores 75options.num_cpus = nb_cores 76 77# system simulated
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73system = System(cpu = cpus,
74 physmem = PhysicalMemory())
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78system = System(cpu = cpus, physmem = PhysicalMemory()) |
79
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76system.ruby = Ruby.create_system(options, system.physmem)
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80system.ruby = Ruby.create_system(options, system) |
81 82assert(options.num_cpus == len(system.ruby.cpu_ruby_ports)) 83 84for (i, cpu) in enumerate(system.cpu): 85 # 86 # Tie the cpu ports to the ruby cpu ports 87 # 88 cpu.icache_port = system.ruby.cpu_ruby_ports[i].port 89 cpu.dcache_port = system.ruby.cpu_ruby_ports[i].port 90 91# ----------------------- 92# run simulation 93# ----------------------- 94 95root = Root( system = system ) 96root.system.mem_mode = 'timing' 97 98# Not much point in this being higher than the L1 latency 99m5.ticks.setGlobalFrequency('1ns')
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