simple-atomic-mp.py (3134:cf578b0dd70d) simple-atomic-mp.py (3200:4b072dcc7a57)
1# Copyright (c) 2006 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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47class L2(BaseCache):
48 block_size = 64
49 latency = 100
50 mshrs = 92
51 tgts_per_mshr = 16
52 write_buffers = 8
53
54nb_cores = 4
1# Copyright (c) 2006 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 38 unchanged lines hidden (view full) ---

47class L2(BaseCache):
48 block_size = 64
49 latency = 100
50 mshrs = 92
51 tgts_per_mshr = 16
52 write_buffers = 8
53
54nb_cores = 4
55cpus = [ AtomicSimpleCPU() for i in xrange(nb_cores) ]
55cpus = [ AtomicSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ]
56
57# system simulated
56
57# system simulated
58system = System(cpu = cpus, physmem = PhysicalMemory(), membus =
58system = System(cpu = cpus, physmem = PhysicalMemory(range = AddrRange('1024MB')), membus =
59Bus())
60
61# l2cache & bus
62system.toL2Bus = Bus()
63system.l2c = L2(size='4MB', assoc=8)
64system.l2c.cpu_side = system.toL2Bus.port
65
66# connect l2c to membus

--- 20 unchanged lines hidden --- 		59Bus())
60
61# l2cache & bus
62system.toL2Bus = Bus()
63system.l2c = L2(size='4MB', assoc=8)
64system.l2c.cpu_side = system.toL2Bus.port
65
66# connect l2c to membus

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