1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 66 unchanged lines hidden (view full) --- 75# create the tester and system, including ruby 76# 77tester = RubyTester(check_flush = check_flush, checks_to_complete = 100, 78 wakeup_frequency = 10, num_cpus = options.num_cpus) 79 80system = System(tester = tester, physmem = SimpleMemory(null = True), 81 clk_domain = SrcClockDomain(clock = options.sys_clock)) 82 |
83system.mem_ranges = AddrRange('256MB') 84 |
85Ruby.create_system(options, system) 86 87# Create a separate clock domain for Ruby 88system.ruby.clk_domain = SrcClockDomain(clock = '1GHz') 89 90assert(options.num_cpus == len(system.ruby._cpu_ruby_ports)) 91 92# --- 29 unchanged lines hidden --- |