40,41c40,41
< hit_latency = '1ns'
< response_latency = '1ns'
---
> hit_latency = 2
> response_latency = 2
53,54c53,54
< hit_latency = '10ns'
< response_latency = '10ns'
---
> hit_latency = 20
> response_latency = 20
65,66c65,66
< hit_latency = '50ns'
< response_latency = '50ns'
---
> hit_latency = 50
> response_latency = 50
77c77
< system.iocache = IOCache()
---
> system.iocache = IOCache(clock = '1GHz')
83c83
< system.toL2Bus = CoherentBus()
---
> system.toL2Bus = CoherentBus(clock = '2GHz')
86c86
< system.l2c = L2(size='4MB', assoc=8)
---
> system.l2c = L2(clock = '2GHz', size='4MB', assoc=8)