pc-simple-timing.py (7926:38ade63ef775) | pc-simple-timing.py (8134:b01a51ff05fa) |
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1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 30 unchanged lines hidden (view full) --- 39# Base L1 Cache 40# ==================== 41 42class L1(BaseCache): 43 latency = '1ns' 44 block_size = 64 45 mshrs = 4 46 tgts_per_mshr = 8 | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 30 unchanged lines hidden (view full) --- 39# Base L1 Cache 40# ==================== 41 42class L1(BaseCache): 43 latency = '1ns' 44 block_size = 64 45 mshrs = 4 46 tgts_per_mshr = 8 |
47 is_top_level = True |
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47 48# ---------------------- 49# Base L2 Cache 50# ---------------------- 51 52class L2(BaseCache): 53 block_size = 64 54 latency = '10ns' --- 62 unchanged lines hidden --- | 48 49# ---------------------- 50# Base L2 Cache 51# ---------------------- 52 53class L2(BaseCache): 54 block_size = 64 55 latency = '10ns' --- 62 unchanged lines hidden --- |