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> from m5.defines import buildEnv
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> from arm_generic import *
> from O3_ARM_v7a import O3_ARM_v7a_3
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< root = BaseSESystemUniprocessor(mem_mode='timing', mem_class=DDR3_1600_x64,
< cpu_class=DerivO3CPU).create_root()
---
> # If we are running ARM regressions, use a more sensible CPU
> # configuration. This makes the results more meaningful, and also
> # increases the coverage of the regressions.
> if buildEnv['TARGET_ISA'] == "arm":
> root = ArmSESystemUniprocessor(mem_mode='timing', mem_class=DDR3_1600_x64,
> cpu_class=O3_ARM_v7a_3).create_root()
> else:
> root = BaseSESystemUniprocessor(mem_mode='timing', mem_class=DDR3_1600_x64,
> cpu_class=DerivO3CPU).create_root()