1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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32
33class MyCache(BaseCache):
34 assoc = 2
35 block_size = 64
36 latency = '1ns'
37 mshrs = 10
38 tgts_per_mshr = 5
39
40class MyL1Cache(MyCache):
41 is_top_level = True
42
43cpu = DerivO3CPU(cpu_id=0)
44cpu.addTwoLevelCacheHierarchy(MyL1Cache(size = '128kB'),
45 MyL1Cache(size = '256kB'),
46 MyCache(size = '2MB'))
47cpu.clock = '2GHz'
48
49system = System(cpu = cpu,
50 physmem = PhysicalMemory(),
51 membus = Bus())
52system.physmem.port = system.membus.port
53cpu.connectAllPorts(system.membus)
54
55root = Root(system = system)