| o3-timing-mp-ruby.py (10405:7a618c07e663) | o3-timing-mp-ruby.py (10720:67b3e74de9ae) |
|---|---|
| 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 24 unchanged lines hidden (view full) --- 33 34nb_cores = 4 35cpus = [ DerivO3CPU(cpu_id=i) for i in xrange(nb_cores) ] 36 37import ruby_config 38ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", nb_cores) 39 40# system simulated | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 24 unchanged lines hidden (view full) --- 33 34nb_cores = 4 35cpus = [ DerivO3CPU(cpu_id=i) for i in xrange(nb_cores) ] 36 37import ruby_config 38ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", nb_cores) 39 40# system simulated |
| 41system = System(cpu = cpus, physmem = ruby_memory, membus = CoherentXBar(), | 41system = System(cpu = cpus, physmem = ruby_memory, membus = SystemXBar(), |
| 42 mem_mode = "timing", 43 clk_domain = SrcClockDomain(clock = '1GHz')) 44 45# Create a seperate clock domain for components that should run at 46# CPUs frequency 47system.cpu_clk_domain = SrcClockDomain(clock = '2GHz') 48 49for cpu in cpus: --- 18 unchanged lines hidden --- | 42 mem_mode = "timing", 43 clk_domain = SrcClockDomain(clock = '1GHz')) 44 45# Create a seperate clock domain for components that should run at 46# CPUs frequency 47system.cpu_clk_domain = SrcClockDomain(clock = '2GHz') 48 49for cpu in cpus: --- 18 unchanged lines hidden --- |