memtest-ruby.py (9790:ccc428657233) memtest-ruby.py (9793:6e6cefc1db1f)
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2010 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 55 unchanged lines hidden (view full) ---

64options.l1i_assoc=2
65options.l2_assoc=2
66options.l3_assoc=2
67
68#MAX CORES IS 8 with the fals sharing method
69nb_cores = 8
70
71# ruby does not support atomic, functional, or uncacheable accesses
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2010 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 55 unchanged lines hidden (view full) ---

64options.l1i_assoc=2
65options.l2_assoc=2
66options.l3_assoc=2
67
68#MAX CORES IS 8 with the fals sharing method
69nb_cores = 8
70
71# ruby does not support atomic, functional, or uncacheable accesses
72cpus = [ MemTest(clock = '2GHz', atomic=False, percent_functional=50,
72cpus = [ MemTest(atomic=False, percent_functional=50,
73 percent_uncacheable=0, suppress_func_warnings=True) \
74 for i in xrange(nb_cores) ]
75
76# overwrite options.num_cpus with the nb_cores value
77options.num_cpus = nb_cores
78
79# system simulated
80system = System(cpu = cpus,
81 funcmem = SimpleMemory(in_addr_map = False),
82 physmem = SimpleMemory(null = True),
73 percent_uncacheable=0, suppress_func_warnings=True) \
74 for i in xrange(nb_cores) ]
75
76# overwrite options.num_cpus with the nb_cores value
77options.num_cpus = nb_cores
78
79# system simulated
80system = System(cpu = cpus,
81 funcmem = SimpleMemory(in_addr_map = False),
82 physmem = SimpleMemory(null = True),
83 funcbus = NoncoherentBus())
84system.clock = options.sys_clock
83 funcbus = NoncoherentBus(),
84 clk_domain = SrcClockDomain(clock = options.sys_clock))
85
85
86# Create a seperate clock domain for components that should run at
87# CPUs frequency
88system.cpu_clk_domain = SrcClockDomain(clock = '2GHz')
89
90# All cpus are associated with cpu_clk_domain
91for cpu in cpus:
92 cpu.clk_domain = system.cpu_clk_domain
93
86Ruby.create_system(options, system)
87
94Ruby.create_system(options, system)
95
96# Create a separate clock domain for Ruby
97system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock)
98
88assert(len(cpus) == len(system.ruby._cpu_ruby_ports))
89
90for (i, ruby_port) in enumerate(system.ruby._cpu_ruby_ports):
91 #
92 # Tie the cpu test and functional ports to the ruby cpu ports and
93 # physmem, respectively
94 #
95 cpus[i].test = ruby_port.slave

--- 20 unchanged lines hidden --- 		99assert(len(cpus) == len(system.ruby._cpu_ruby_ports))
100
101for (i, ruby_port) in enumerate(system.ruby._cpu_ruby_ports):
102 #
103 # Tie the cpu test and functional ports to the ruby cpu ports and
104 # physmem, respectively
105 #
106 cpus[i].test = ruby_port.slave

--- 20 unchanged lines hidden ---