1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2010 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 28 unchanged lines hidden (view full) --- 37 panic("This script requires system-emulation mode (*_SE).") 38 39# Get paths we might need 40config_path = os.path.dirname(os.path.abspath(__file__)) 41config_root = os.path.dirname(config_path) 42m5_root = os.path.dirname(config_root) 43addToPath(config_root+'/configs/common') 44addToPath(config_root+'/configs/ruby') |
45 46import Ruby 47 48parser = optparse.OptionParser() 49 50# |
51# Add the ruby specific and protocol specific options |
52# |
53Ruby.define_options(parser) |
54 55execfile(os.path.join(config_root, "configs/common", "Options.py")) 56 57(options, args) = parser.parse_args() 58 |
59# 60# Set the default cache size and associativity to be very small to encourage 61# races between requests and writebacks. 62# 63options.l1d_size="256B" 64options.l1i_size="256B" 65options.l2_size="512B" 66options.l3_size="1kB" 67options.l1d_assoc=2 68options.l1i_assoc=2 69options.l2_assoc=2 70options.l3_assoc=2 71 |
72#MAX CORES IS 8 with the fals sharing method 73nb_cores = 8 74 75# ruby does not support atomic, functional, or uncacheable accesses 76cpus = [ MemTest(atomic=False, percent_functional=0, \ 77 percent_uncacheable=0) \ 78 for i in xrange(nb_cores) ] 79 80# overwrite options.num_cpus with the nb_cores value 81options.num_cpus = nb_cores 82 83# system simulated 84system = System(cpu = cpus, 85 funcmem = PhysicalMemory(), 86 physmem = PhysicalMemory()) 87 |
88system.ruby = Ruby.create_system(options, system) |
89 90assert(len(cpus) == len(system.ruby.cpu_ruby_ports)) 91 92for (i, ruby_port) in enumerate(system.ruby.cpu_ruby_ports): 93 # 94 # Tie the cpu test and functional ports to the ruby cpu ports and 95 # physmem, respectively 96 # --- 12 unchanged lines hidden --- |