base_config.py (9826:014ff1fbff6d) | base_config.py (9827:f47274776aa0) |
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1# Copyright (c) 2012-2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 137 unchanged lines hidden (view full) --- 146 sha_bus = self.create_caches_shared(system) 147 for cpu in system.cpu: 148 self.init_cpu(system, cpu, sha_bus) 149 150 def create_clk_src(self,system): 151 # Create system clock domain. This provides clock value to every 152 # clocked object that lies beneath it unless explicitly overwritten 153 # by a different clock domain. | 1# Copyright (c) 2012-2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 137 unchanged lines hidden (view full) --- 146 sha_bus = self.create_caches_shared(system) 147 for cpu in system.cpu: 148 self.init_cpu(system, cpu, sha_bus) 149 150 def create_clk_src(self,system): 151 # Create system clock domain. This provides clock value to every 152 # clocked object that lies beneath it unless explicitly overwritten 153 # by a different clock domain. |
154 system.clk_domain = SrcClockDomain(clock = '1GHz') | 154 system.voltage_domain = VoltageDomain() 155 system.clk_domain = SrcClockDomain(clock = '1GHz', 156 voltage_domain = 157 system.voltage_domain) |
155 156 # Create a seperate clock domain for components that should 157 # run at CPUs frequency | 158 159 # Create a seperate clock domain for components that should 160 # run at CPUs frequency |
158 system.cpu_clk_domain = SrcClockDomain(clock = '2GHz') | 161 system.cpu_clk_domain = SrcClockDomain(clock = '2GHz', 162 voltage_domain = 163 system.voltage_domain) |
159 160 @abstractmethod 161 def create_system(self): 162 """Create an return an initialized system.""" 163 pass 164 165 @abstractmethod 166 def create_root(self): --- 107 unchanged lines hidden --- | 164 165 @abstractmethod 166 def create_system(self): 167 """Create an return an initialized system.""" 168 pass 169 170 @abstractmethod 171 def create_root(self): --- 107 unchanged lines hidden --- |