base_config.py (9408:10a84dceab25) base_config.py (9447:156f74caf0d4)
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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116
117 Arguments:
118 system -- System to initialize.
119 """
120 system.cpu = self.create_cpus()
121
122 sha_bus = self.create_caches_shared(system)
123 for cpu in system.cpu:
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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116
117 Arguments:
118 system -- System to initialize.
119 """
120 system.cpu = self.create_cpus()
121
122 sha_bus = self.create_caches_shared(system)
123 for cpu in system.cpu:
124 self.create_caches_private(cpu)
125 self.init_cpu(system, cpu)
126 cpu.connectAllPorts(sha_bus if sha_bus != None else system.membus,
127 system.membus)
124 if not cpu.switched_out:
125 self.create_caches_private(cpu)
126 self.init_cpu(system, cpu)
127 cpu.connectAllPorts(sha_bus if sha_bus != None else system.membus,
128 system.membus)
129 else:
130 self.init_cpu(system, cpu)
128
129 @abstractmethod
130 def create_system(self):
131 """Create an return an initialized system."""
132 pass
133
134 @abstractmethod
135 def create_root(self):

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168
169 def create_caches_private(self, cpu):
170 cpu.addTwoLevelCacheHierarchy(L1Cache(size='32kB', assoc=1),
171 L1Cache(size='32kB', assoc=4),
172 L2Cache(size='4MB', assoc=8))
173
174 def create_caches_shared(self, system):
175 return None
131
132 @abstractmethod
133 def create_system(self):
134 """Create an return an initialized system."""
135 pass
136
137 @abstractmethod
138 def create_root(self):

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171
172 def create_caches_private(self, cpu):
173 cpu.addTwoLevelCacheHierarchy(L1Cache(size='32kB', assoc=1),
174 L1Cache(size='32kB', assoc=4),
175 L2Cache(size='4MB', assoc=8))
176
177 def create_caches_shared(self, system):
178 return None
179
180class BaseFSSwitcheroo(BaseFSSystem):
181 """Uniprocessor system prepared for CPU switching"""
182
183 def __init__(self, cpu_classes, **kwargs):
184 BaseFSSystem.__init__(self, **kwargs)
185 self.cpu_classes = tuple(cpu_classes)
186
187 def create_cpus(self):
188 cpus = [ cclass(cpu_id=0, clock='2GHz', switched_out=True)
189 for cclass in self.cpu_classes ]
190 cpus[0].switched_out = False
191 return cpus