simple.S (8280:5dddde1126c2) simple.S (9190:3e5761bfa300)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 54 unchanged lines hidden (view full) ---

63 b bootldr
64 b bootldr
65 b bootldr
66 b bootldr
67 b bootldr
68
69bootldr:
70 mrc p15, 0, r8, c0, c0, 5 // get the MPIDR register
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 54 unchanged lines hidden (view full) ---

63 b bootldr
64 b bootldr
65 b bootldr
66 b bootldr
67 b bootldr
68
69bootldr:
70 mrc p15, 0, r8, c0, c0, 5 // get the MPIDR register
71 uxtb r8, r8 // isolate the lower 8 bits (affinity lvl 1)
72 adds r8, r8, #0 // set flags for branch
71 bics r8, r8, #0xff000000 // isolate the lower 24 bits (affinity levels)
73 bxeq r3 // if it's 0 (CPU 0), branch to kernel
74 mov r8, #1
75 str r8, [r4, #0] // Enable CPU interface on GIC
76 wfi // wait for an interrupt
77pen:
78 ldr r8, [r5] // load the value
79 movs r8, r8 // set the flags on this value
80 beq pen // if it's zero try again
81 bx r8 // Jump to where we've been told
82 bkpt // We should never get here
72 bxeq r3 // if it's 0 (CPU 0), branch to kernel
73 mov r8, #1
74 str r8, [r4, #0] // Enable CPU interface on GIC
75 wfi // wait for an interrupt
76pen:
77 ldr r8, [r5] // load the value
78 movs r8, r8 // set the flags on this value
79 beq pen // if it's zero try again
80 bx r8 // Jump to where we've been told
81 bkpt // We should never get here