1/* 2 * Copyright (c) 2015-2017 ARM Limited 3 * All rights reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 26 unchanged lines hidden (view full) --- 35 #address-cells = <2>; 36 #size-cells = <2>; 37 38 gic: interrupt-controller@2c000000 { 39 compatible = "arm,gic-v3"; 40 #interrupt-cells = <0x3>; 41 #address-cells = <0x2>; 42 interrupt-controller; |
43 redistributor-stride = <0x0 0x40000>; // 256kB stride |
44 reg = <0x0 0x2c000000 0x0 0x10000 |
45 0x0 0x2c010000 0x0 0x2000000 // room for 128 redistributors using 128K each (256K strided...) |
46 0x0 0x0 0x0 0x0>; 47 interrupts = <1 9 0xf04>; 48 #size-cells = <0x2>; 49 linux,phandle = <0x1>; 50 phandle = <0x1>; 51 }; 52 53 timer { --- 140 unchanged lines hidden --- |