1/*
2 * Copyright (c) 2015-2018 ARM Limited
3 * All rights reserved
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the

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23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Andreas Sandberg
29 */
30
31#include "vexpress_gem5_v1_base.dtsi"
32
33/ {
34 /* The display processor needs custom configuration to setup its
35 * output ports. Disable it by default in the platform until the
36 * DT bindings have stabilize.
37 */
38 dp0: hdlcd@2b000000 {
39 compatible = "arm,hdlcd";
40 reg = <0x0 0x2b000000 0x0 0x1000>;
41 interrupts = <0 63 4>;
42 clocks = <&osc_pxl>;
43 clock-names = "pxlclk";
44
45 status = "disabled";
46 };
47};