1/* 2 * Copyright (c) 2015-2016 ARM Limited 3 * All rights reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 98 unchanged lines hidden (view full) --- 107 #if CONF_CPUS > 16 108 #error Unsupported number of CPUs 109 #endif 110 }; 111 112 virt-encoder { 113 compatible = "drm,virtual-encoder"; 114 port { |
115 dp0_virt_input: endpoint@0 { 116 remote-endpoint = <&dp0_output>; |
117 }; 118 }; 119 120 display-timings { 121 native-mode = <&timing0>; 122 123 timing0: timing_1080p60 { 124 /* 1920x1080-60 */ --- 6 unchanged lines hidden (view full) --- 131 vfront-porch = <36>; 132 vback-porch = <4>; 133 vsync-len = <5>; 134 }; 135 }; 136 }; 137}; 138 |
139&dp0 { |
140 status = "ok"; 141 142 port { |
143 dp0_output: endpoint@0 { 144 remote-endpoint = <&dp0_virt_input>; |
145 }; 146 }; 147}; |