1/* 2 * Copyright (c) 2015-2016 ARM Limited 3 * All rights reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 94 unchanged lines hidden (view full) --- 103 #if CONF_CPUS > 16 104 #error Unsupported number of CPUs 105 #endif 106 }; 107 108 virt-encoder { 109 compatible = "drm,virtual-encoder"; 110 port { |
111 dp0_virt_input: endpoint@0 { 112 remote-endpoint = <&dp0_output>; |
113 }; 114 }; 115 116 display-timings { 117 native-mode = <&timing0>; 118 119 timing0: timing_1080p60 { 120 /* 1920x1080-60 */ --- 6 unchanged lines hidden (view full) --- 127 vfront-porch = <36>; 128 vback-porch = <4>; 129 vsync-len = <5>; 130 }; 131 }; 132 }; 133}; 134 |
135&dp0 { |
136 status = "ok"; 137 138 port { |
139 dp0_output: endpoint@0 { 140 remote-endpoint = <&dp0_virt_input>; |
141 }; 142 }; 143}; |