1/*
2 * Copyright 1995 Hewlett-Packard Development Company, L.P.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25#ifndef EV5_DEFS_INCLUDED
26#define EV5_DEFS_INCLUDED 1
27
28// adapted from the version emailed to lance..pb Nov/95
29
30// In the definitions below, registers are annotated with one of the
31// following symbols:
32//
33// RW - The register may be read and written
34// RO - The register may only be read
35// WO - The register may only be written
36//
37// For RO and WO registers, all bits and fields within the register
38// are also read-only or write-only. For RW registers, each bit or
39// field within the register is annotated with one of the following:
40//
41// RW - The bit/field may be read and written
42// RO - The bit/field may be read; writes are ignored
43// WO - The bit/field may be written; reads return an UNPREDICTABLE result
44// WZ - The bit/field may be written; reads return a 0
45// WC - The bit/field may be read; writes cause state to clear
46// RC - The bit/field may be read, which also causes state to clear;
47// writes are ignored
48// Architecturally-defined (SRM) registers for EVMS
49
50#define pt0 320
51#define pt1 321
52#define pt2 322
53#define pt3 323
54#define pt4 324
55#define pt5 325
56#define pt6 326
57#define pt7 327
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2 * Copyright 1995 Hewlett-Packard Development Company, L.P.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25#ifndef EV5_DEFS_INCLUDED
26#define EV5_DEFS_INCLUDED 1
27
28// adapted from the version emailed to lance..pb Nov/95
29
30// In the definitions below, registers are annotated with one of the
31// following symbols:
32//
33// RW - The register may be read and written
34// RO - The register may only be read
35// WO - The register may only be written
36//
37// For RO and WO registers, all bits and fields within the register
38// are also read-only or write-only. For RW registers, each bit or
39// field within the register is annotated with one of the following:
40//
41// RW - The bit/field may be read and written
42// RO - The bit/field may be read; writes are ignored
43// WO - The bit/field may be written; reads return an UNPREDICTABLE result
44// WZ - The bit/field may be written; reads return a 0
45// WC - The bit/field may be read; writes cause state to clear
46// RC - The bit/field may be read, which also causes state to clear;
47// writes are ignored
48// Architecturally-defined (SRM) registers for EVMS
49
50#define pt0 320
51#define pt1 321
52#define pt2 322
53#define pt3 323
54#define pt4 324
55#define pt5 325
56#define pt6 326
57#define pt7 327
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