console.c (8013:2dfcde2e9998) console.c (8015:37634fc80b3c)
1/*
2 * Copyright (c) 2003, 2004
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator, developed by Nathan Binkert,
7 * Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
8 * from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew

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68#define CONS_INT_RX 0x02
69
70#define PAGE_SIZE (8192)
71
72#define KSEG 0xfffffc0000000000
73#define K1BASE 0xfffffc8000000000
74#define KSEG_TO_PHYS(x) (((ulong)x) & ~KSEG)
75
1/*
2 * Copyright (c) 2003, 2004
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator, developed by Nathan Binkert,
7 * Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
8 * from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew

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68#define CONS_INT_RX 0x02
69
70#define PAGE_SIZE (8192)
71
72#define KSEG 0xfffffc0000000000
73#define K1BASE 0xfffffc8000000000
74#define KSEG_TO_PHYS(x) (((ulong)x) & ~KSEG)
75
76#ifdef TSUNAMI
77#define ALPHA_ACCESS_BASE 0xfffffd0200000000
78#elif TLASER
79#define ALPHA_ACCESS_BASE 0xfffffc8000a00000
80#else
81#error TSUNAMI/TLASER not defined.
82#endif
83
84#define ROUNDUP8(x) ((ulong)(((ulong)x)+7) & ~7)
85#define ROUNDUP128(x) ((ulong)(((ulong)x) + 127) & ~127)
86#define ROUNDUP8K(x) ((ulong)(((ulong)(x)) + 8191) & ~8191)
87
88#define FIRST(x) ((((ulong)(x)) >> 33) & 0x3ff)
89#define SECOND(x) ((((ulong)(x)) >> 23) & 0x3ff)
90#define THIRD(x) ((((ulong)(x)) >> 13) & 0x3ff)
91#define THIRD_XXX(x) ((((ulong)(x)) >> 13) & 0xfff)

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108
109
110void unixBoot(int go, int argc, char **argv);
111void JToKern(char *bootadr, ulong rpb_percpu, ulong free_pfn, ulong k_argc,
112 char **k_argv, char **envp);
113void JToPal(ulong bootadr);
114void SlaveLoop(int cpu);
115
76#define ROUNDUP8(x) ((ulong)(((ulong)x)+7) & ~7)
77#define ROUNDUP128(x) ((ulong)(((ulong)x) + 127) & ~127)
78#define ROUNDUP8K(x) ((ulong)(((ulong)(x)) + 8191) & ~8191)
79
80#define FIRST(x) ((((ulong)(x)) >> 33) & 0x3ff)
81#define SECOND(x) ((((ulong)(x)) >> 23) & 0x3ff)
82#define THIRD(x) ((((ulong)(x)) >> 13) & 0x3ff)
83#define THIRD_XXX(x) ((((ulong)(x)) >> 13) & 0xfff)

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100
101
102void unixBoot(int go, int argc, char **argv);
103void JToKern(char *bootadr, ulong rpb_percpu, ulong free_pfn, ulong k_argc,
104 char **k_argv, char **envp);
105void JToPal(ulong bootadr);
106void SlaveLoop(int cpu);
107
108volatile struct AlphaAccess *m5AlphaAccess;
116struct AlphaAccess m5Conf;
117
118ulong theLock;
119
120extern void SpinLock(ulong *lock);
121#define SpinUnlock(_x) *(_x) = 0;
122
123struct _kernel_params {

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141void
142InitConsole()
143{
144}
145
146char
147GetChar()
148{
109struct AlphaAccess m5Conf;
110
111ulong theLock;
112
113extern void SpinLock(ulong *lock);
114#define SpinUnlock(_x) *(_x) = 0;
115
116struct _kernel_params {

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134void
135InitConsole()
136{
137}
138
139char
140GetChar()
141{
149 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
150 return k1Conf->inputChar;
142 return m5AlphaAccess->inputChar;
151}
152
153void
154PutChar(char c)
155{
143}
144
145void
146PutChar(char c)
147{
156 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
157 k1Conf->outputChar = c;
148 m5AlphaAccess->outputChar = c;
158}
159
160int
161passArgs(int argc)
162{
163 return 0;
164}
165
166int
167main(int argc, char **argv)
168{
169 int x, i;
149}
150
151int
152passArgs(int argc)
153{
154 return 0;
155}
156
157int
158main(int argc, char **argv)
159{
160 int x, i;
170 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
171 uint *k1ptr, *ksegptr;
172
173 InitConsole();
161 uint *k1ptr, *ksegptr;
162
163 InitConsole();
174 printf_lock("M5 console\n");
164 printf_lock("M5 console: m5AlphaAccess @ 0x%x\n", m5AlphaAccess);
175
176 /*
177 * get configuration from backdoor
178 */
165
166 /*
167 * get configuration from backdoor
168 */
179 m5Conf.last_offset = k1Conf->last_offset;
169 m5Conf.last_offset = m5AlphaAccess->last_offset;
180 printf_lock("Got Configuration %d\n", m5Conf.last_offset);
181
170 printf_lock("Got Configuration %d\n", m5Conf.last_offset);
171
182 m5Conf.last_offset = k1Conf->last_offset;
183 m5Conf.version = k1Conf->version;
184 m5Conf.numCPUs = k1Conf->numCPUs;
185 m5Conf.intrClockFrequency = k1Conf->intrClockFrequency;
186 m5Conf.cpuClock = k1Conf->cpuClock;
187 m5Conf.mem_size = k1Conf->mem_size;
188 m5Conf.kernStart = k1Conf->kernStart;
189 m5Conf.kernEnd = k1Conf->kernEnd;
190 m5Conf.entryPoint = k1Conf->entryPoint;
191 m5Conf.diskUnit = k1Conf->diskUnit;
192 m5Conf.diskCount = k1Conf->diskCount;
193 m5Conf.diskPAddr = k1Conf->diskPAddr;
194 m5Conf.diskBlock = k1Conf->diskBlock;
195 m5Conf.diskOperation = k1Conf->diskOperation;
196 m5Conf.outputChar = k1Conf->outputChar;
197 m5Conf.inputChar = k1Conf->inputChar;
198 m5Conf.bootStrapImpure = k1Conf->bootStrapImpure;
199 m5Conf.bootStrapCPU = k1Conf->bootStrapCPU;
172 m5Conf.last_offset = m5AlphaAccess->last_offset;
173 m5Conf.version = m5AlphaAccess->version;
174 m5Conf.numCPUs = m5AlphaAccess->numCPUs;
175 m5Conf.intrClockFrequency = m5AlphaAccess->intrClockFrequency;
176 m5Conf.cpuClock = m5AlphaAccess->cpuClock;
177 m5Conf.mem_size = m5AlphaAccess->mem_size;
178 m5Conf.kernStart = m5AlphaAccess->kernStart;
179 m5Conf.kernEnd = m5AlphaAccess->kernEnd;
180 m5Conf.entryPoint = m5AlphaAccess->entryPoint;
181 m5Conf.diskUnit = m5AlphaAccess->diskUnit;
182 m5Conf.diskCount = m5AlphaAccess->diskCount;
183 m5Conf.diskPAddr = m5AlphaAccess->diskPAddr;
184 m5Conf.diskBlock = m5AlphaAccess->diskBlock;
185 m5Conf.diskOperation = m5AlphaAccess->diskOperation;
186 m5Conf.outputChar = m5AlphaAccess->outputChar;
187 m5Conf.inputChar = m5AlphaAccess->inputChar;
188 m5Conf.bootStrapImpure = m5AlphaAccess->bootStrapImpure;
189 m5Conf.bootStrapCPU = m5AlphaAccess->bootStrapCPU;
200
201 if (m5Conf.version != ALPHA_ACCESS_VERSION) {
202 panic("Console version mismatch. Console expects %d. has %d \n",
203 ALPHA_ACCESS_VERSION, m5Conf.version);
204 }
205
206 /*
207 * setup arguments to kernel

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771 while (lp1 < lp2)
772 sum += *lp1++;
773 *lp2 = sum;
774
775 /*
776 * MP bootstrap
777 */
778 for (i = 1; i < m5Conf.numCPUs; i++) {
190
191 if (m5Conf.version != ALPHA_ACCESS_VERSION) {
192 panic("Console version mismatch. Console expects %d. has %d \n",
193 ALPHA_ACCESS_VERSION, m5Conf.version);
194 }
195
196 /*
197 * setup arguments to kernel

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761 while (lp1 < lp2)
762 sum += *lp1++;
763 *lp2 = sum;
764
765 /*
766 * MP bootstrap
767 */
768 for (i = 1; i < m5Conf.numCPUs; i++) {
779 volatile struct AlphaAccess *k1Conf;
780 k1Conf = (volatile struct AlphaAccess *)(ALPHA_ACCESS_BASE);
781 printf_lock("Bootstraping CPU %d with sp=0x%x\n",
782 i, bootStrapImpure[i]);
769 printf_lock("Bootstraping CPU %d with sp=0x%x\n",
770 i, bootStrapImpure[i]);
783 k1Conf->bootStrapImpure = bootStrapImpure[i];
784 k1Conf->bootStrapCPU = i;
771 m5AlphaAccess->bootStrapImpure = bootStrapImpure[i];
772 m5AlphaAccess->bootStrapCPU = i;
785 }
786
787 /*
788 * Make sure that we are not stepping on the kernel
789 */
790 if ((ulong)unix_boot_mem >= (ulong)m5Conf.kernStart) {
791 panic("CONSOLE: too much memory. Smashing kernel\n");
792 } else {

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861 char name[128];
862} deviceState[32];
863
864#define BOOTDEVICE_NAME "SCSI 1 0 0 1 100 0"
865
866void
867DeviceOperation(long op, long channel, long count, long address, long block)
868{
773 }
774
775 /*
776 * Make sure that we are not stepping on the kernel
777 */
778 if ((ulong)unix_boot_mem >= (ulong)m5Conf.kernStart) {
779 panic("CONSOLE: too much memory. Smashing kernel\n");
780 } else {

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849 char name[128];
850} deviceState[32];
851
852#define BOOTDEVICE_NAME "SCSI 1 0 0 1 100 0"
853
854void
855DeviceOperation(long op, long channel, long count, long address, long block)
856{
869 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
870 long pAddr;
871
872 if (strcmp(deviceState[channel].name, BOOTDEVICE_NAME )) {
873 panic("DeviceRead: only implemented for root disk \n");
874 }
875 pAddr = KSEG_TO_PHYS(address);
876 if (pAddr + count > m5Conf.mem_size) {
877 panic("DeviceRead: request out of range \n");
878 }
879
857 long pAddr;
858
859 if (strcmp(deviceState[channel].name, BOOTDEVICE_NAME )) {
860 panic("DeviceRead: only implemented for root disk \n");
861 }
862 pAddr = KSEG_TO_PHYS(address);
863 if (pAddr + count > m5Conf.mem_size) {
864 panic("DeviceRead: request out of range \n");
865 }
866
880 k1Conf->diskCount = count;
881 k1Conf->diskPAddr = pAddr;
882 k1Conf->diskBlock = block;
883 k1Conf->diskOperation = op; /* launch */
867 m5AlphaAccess->diskCount = count;
868 m5AlphaAccess->diskPAddr = pAddr;
869 m5AlphaAccess->diskBlock = block;
870 m5AlphaAccess->diskOperation = op; /* launch */
884}
885
886/*
887 * M5 Console callbacks
888 *
889 */
890
891/* AXP manual 2-31 */

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872
873/*
874 * M5 Console callbacks
875 *
876 */
877
878/* AXP manual 2-31 */

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