console.c (7990:9ad86367e30d) console.c (7999:9d6c5bc4e1f9)
1
2
3/* ******************************************
4 * SimOS SRM Console
5 *
6 * Derived from Lance Berc's SRM console
7 * for the SRC XXM�Machine
8 * ******************************************/
9
10
11typedef unsigned long long uint64_t;
12typedef unsigned long long uint64;
13typedef unsigned int uint32_t;
14typedef unsigned int uint32;
15
16#define CONSOLE
17#include "alpha_access.h"
1
2
3/* ******************************************
4 * SimOS SRM Console
5 *
6 * Derived from Lance Berc's SRM console
7 * for the SRC XXM�Machine
8 * ******************************************/
9
10
11typedef unsigned long long uint64_t;
12typedef unsigned long long uint64;
13typedef unsigned int uint32_t;
14typedef unsigned int uint32;
15
16#define CONSOLE
17#include "alpha_access.h"
18#include "machine_defs.h"
19
20#if 0
21#include "new_aouthdr.h"
22#include "srcmax.h"
23#endif
24
25/* from ../h */
26#include "lib.h"
27#include "rpb.h"
28#include "cserve.h"
29
30#define CONS_INT_TX 0x01 /* interrupt enable / state bits */
31#define CONS_INT_RX 0x02
32
33#define KSEG 0xfffffc0000000000
34#define K1BASE 0xfffffc8000000000
35#define KSEG_TO_PHYS(x)(((ul)x) & ~KSEG)
36
18
19#if 0
20#include "new_aouthdr.h"
21#include "srcmax.h"
22#endif
23
24/* from ../h */
25#include "lib.h"
26#include "rpb.h"
27#include "cserve.h"
28
29#define CONS_INT_TX 0x01 /* interrupt enable / state bits */
30#define CONS_INT_RX 0x02
31
32#define KSEG 0xfffffc0000000000
33#define K1BASE 0xfffffc8000000000
34#define KSEG_TO_PHYS(x)(((ul)x) & ~KSEG)
35
37#define CDR ((volatile DevConsoleRegisters *) \
38 (__MAGIC_ZONE(0, 0, MAGIC_ZONE_BDOOR_DEV) + __MAGIC_BDOOR_CNSLE_OFFS))
36#define ALPHA_ACCESS_BASE 0xfffffc8000a00000
39
40
41#define PHYS_TO_K1(_x) (K1BASE|(_x))
42
43#define AOUT_LOAD_ADDR (KSEG|0xf000)
44
45#define ROUNDUP8(x) ((ul)(((ul)x)+7) & ~7)
46#define ROUNDUP128(x) ((ul)(((ul)x)+127) & ~127)

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113{
114#if 0
115 CDR->intr_status =(DevRegister)(DEV_CNSLE_RX_INTR |DEV_CNSLE_TX_INTR);
116#endif
117}
118
119char GetChar()
120{
37
38
39#define PHYS_TO_K1(_x) (K1BASE|(_x))
40
41#define AOUT_LOAD_ADDR (KSEG|0xf000)
42
43#define ROUNDUP8(x) ((ul)(((ul)x)+7) & ~7)
44#define ROUNDUP128(x) ((ul)(((ul)x)+127) & ~127)

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111{
112#if 0
113 CDR->intr_status =(DevRegister)(DEV_CNSLE_RX_INTR |DEV_CNSLE_TX_INTR);
114#endif
115}
116
117char GetChar()
118{
121 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(__MAGIC_ZONE(0, 0, MAGIC_ZONE_EV5_ALIAS));
119 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
122 return k1Conf->inputChar;
123}
124
125void PutChar(char c)
126{
127#if 0
128 CDR->data = c;
129#endif
130#if 0
131 *(int*) PHYS_TO_K1(SLOT_D_COM1<<5) = c;
132#endif
120 return k1Conf->inputChar;
121}
122
123void PutChar(char c)
124{
125#if 0
126 CDR->data = c;
127#endif
128#if 0
129 *(int*) PHYS_TO_K1(SLOT_D_COM1<<5) = c;
130#endif
133 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(__MAGIC_ZONE(0, 0, MAGIC_ZONE_EV5_ALIAS));
131 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
134 k1Conf->outputChar = c;
135
136}
137
138
139int
140passArgs(int argc)
141{ return 0; }
142
143int
144main(int argc, char **argv)
145{
146 int x,i;
132 k1Conf->outputChar = c;
133
134}
135
136
137int
138passArgs(int argc)
139{ return 0; }
140
141int
142main(int argc, char **argv)
143{
144 int x,i;
147 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(__MAGIC_ZONE(0, 0, MAGIC_ZONE_EV5_ALIAS));
145 struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
148 ui *k1ptr,*ksegptr;
149
150
151 InitConsole();
152 printf("SimOS console \n");
153 /*
154 * get configuration from backdoor
155 */

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823 /*
824 * MP bootstrap
825 */
826
827 {
828 int i;
829 for (i=1;i<simosConf.numCPUs;i++) {
830 volatile struct AlphaAccess *k1Conf = (volatile struct AlphaAccess *)
146 ui *k1ptr,*ksegptr;
147
148
149 InitConsole();
150 printf("SimOS console \n");
151 /*
152 * get configuration from backdoor
153 */

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821 /*
822 * MP bootstrap
823 */
824
825 {
826 int i;
827 for (i=1;i<simosConf.numCPUs;i++) {
828 volatile struct AlphaAccess *k1Conf = (volatile struct AlphaAccess *)
831 (__MAGIC_ZONE(0, 0, MAGIC_ZONE_EV5_ALIAS));
829 (ALPHA_ACCESS_BASE);
832 SpinLock(&theLock);
833 printf("Bootstraping CPU %d with sp=0x%x \n",
834 i,bootStrapImpure[i]);
835 SpinUnlock(&theLock);
836 k1Conf->bootStrapImpure = bootStrapImpure[i];
837 k1Conf->bootStrapCPU = i;
838 }
839 }

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965} deviceState[32];
966
967#define BOOTDEVICE_NAME "SCSI 1 0 0 1 100 0"
968
969void
970DeviceOperation(long op, long channel, long count, long address, long block)
971{
972 struct AlphaAccess *k1Conf = (struct AlphaAccess *)
830 SpinLock(&theLock);
831 printf("Bootstraping CPU %d with sp=0x%x \n",
832 i,bootStrapImpure[i]);
833 SpinUnlock(&theLock);
834 k1Conf->bootStrapImpure = bootStrapImpure[i];
835 k1Conf->bootStrapCPU = i;
836 }
837 }

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963} deviceState[32];
964
965#define BOOTDEVICE_NAME "SCSI 1 0 0 1 100 0"
966
967void
968DeviceOperation(long op, long channel, long count, long address, long block)
969{
970 struct AlphaAccess *k1Conf = (struct AlphaAccess *)
973 (__MAGIC_ZONE(0, 0, MAGIC_ZONE_EV5_ALIAS));
971 (ALPHA_ACCESS_BASE);
974
975 long pAddr;
976
977#if 0
978 printf("Console::DeviceRead count=0x%x address=0x%x block=0x%x\n",
979 count,address,block);
980#endif
981

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973 long pAddr;
974
975#if 0
976 printf("Console::DeviceRead count=0x%x address=0x%x block=0x%x\n",
977 count,address,block);
978#endif
979

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