sc_signal_rv.hh (13274:79ce1482d383) | sc_signal_rv.hh (13330:bcb4b4dea5d8) |
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1/* 2 * Copyright 2018 Google, Inc. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer; 8 * redistributions in binary form must reproduce the above copyright --- 17 unchanged lines hidden (view full) --- 26 * 27 * Authors: Gabe Black 28 */ 29 30#ifndef __SYSTEMC_EXT_CHANNEL_SC_SIGNAL_RV_HH__ 31#define __SYSTEMC_EXT_CHANNEL_SC_SIGNAL_RV_HH__ 32 33#include "../core/sc_module.hh" // for sc_gen_unique_name | 1/* 2 * Copyright 2018 Google, Inc. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer; 8 * redistributions in binary form must reproduce the above copyright --- 17 unchanged lines hidden (view full) --- 26 * 27 * Authors: Gabe Black 28 */ 29 30#ifndef __SYSTEMC_EXT_CHANNEL_SC_SIGNAL_RV_HH__ 31#define __SYSTEMC_EXT_CHANNEL_SC_SIGNAL_RV_HH__ 32 33#include "../core/sc_module.hh" // for sc_gen_unique_name |
34#include "../core/scheduler.hh" | |
35#include "../dt/bit/sc_logic.hh" 36#include "../dt/bit/sc_lv.hh" 37#include "sc_signal.hh" 38 | 34#include "../dt/bit/sc_logic.hh" 35#include "../dt/bit/sc_lv.hh" 36#include "sc_signal.hh" 37 |
38namespace sc_gem5 39{ 40 41class Process; 42Process *getCurrentProcess(); 43 44} // namespace sc_gem5 45 |
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39namespace sc_dt 40{ 41 42template <int W> 43class sc_lv; 44 45}; 46 --- 14 unchanged lines hidden (view full) --- 61 {} 62 virtual ~sc_signal_rv() {} 63 64 virtual void register_port(sc_port_base &, const char *) {} 65 66 virtual void 67 write(const sc_dt::sc_lv<W> &l) 68 { | 46namespace sc_dt 47{ 48 49template <int W> 50class sc_lv; 51 52}; 53 --- 14 unchanged lines hidden (view full) --- 68 {} 69 virtual ~sc_signal_rv() {} 70 71 virtual void register_port(sc_port_base &, const char *) {} 72 73 virtual void 74 write(const sc_dt::sc_lv<W> &l) 75 { |
69 ::sc_gem5::Process *p = ::sc_gem5::scheduler.current(); | 76 ::sc_gem5::Process *p = ::sc_gem5::getCurrentProcess(); |
70 71 auto it = inputs.find(p); 72 if (it == inputs.end()) { 73 inputs.emplace(p, l); 74 this->request_update(); 75 } else if (it->second != l) { 76 it->second = l; 77 this->request_update(); --- 57 unchanged lines hidden --- | 77 78 auto it = inputs.find(p); 79 if (it == inputs.end()) { 80 inputs.emplace(p, l); 81 this->request_update(); 82 } else if (it->second != l) { 83 it->second = l; 84 this->request_update(); --- 57 unchanged lines hidden --- |