system.hh (9645:c483700ae0ce) system.hh (9814:7ad2b0186a32)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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174 *
175 * \warn This should only be called by the Python!
176 *
177 * @param mode Mode to change to (atomic/timing/...)
178 */
179 void setMemoryMode(Enums::MemoryMode mode);
180 /** @} */
181
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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174 *
175 * \warn This should only be called by the Python!
176 *
177 * @param mode Mode to change to (atomic/timing/...)
178 */
179 void setMemoryMode(Enums::MemoryMode mode);
180 /** @} */
181
182 /**
183 * Get the cache line size of the system.
184 */
185 unsigned int cacheLineSize() const { return _cacheLineSize; }
186
182 PCEventQueue pcEventQueue;
183
184 std::vector<ThreadContext *> threadContexts;
185 int _numContexts;
186
187 ThreadContext *getThreadContext(ThreadID tid)
188 {
189 return threadContexts[tid];

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258 */
259 bool isMemAddr(Addr addr) const;
260
261 protected:
262
263 PhysicalMemory physmem;
264
265 Enums::MemoryMode memoryMode;
187 PCEventQueue pcEventQueue;
188
189 std::vector<ThreadContext *> threadContexts;
190 int _numContexts;
191
192 ThreadContext *getThreadContext(ThreadID tid)
193 {
194 return threadContexts[tid];

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263 */
264 bool isMemAddr(Addr addr) const;
265
266 protected:
267
268 PhysicalMemory physmem;
269
270 Enums::MemoryMode memoryMode;
271
272 const unsigned int _cacheLineSize;
273
266 uint64_t workItemsBegin;
267 uint64_t workItemsEnd;
268 uint32_t numWorkIds;
269 std::vector<bool> activeCpus;
270
271 /** This array is a per-sytem list of all devices capable of issuing a
272 * memory system request and an associated string for each master id.
273 * It's used to uniquely id any master in the system by name for things

--- 259 unchanged lines hidden --- 		274 uint64_t workItemsBegin;
275 uint64_t workItemsEnd;
276 uint32_t numWorkIds;
277 std::vector<bool> activeCpus;
278
279 /** This array is a per-sytem list of all devices capable of issuing a
280 * memory system request and an associated string for each master id.
281 * It's used to uniquely id any master in the system by name for things

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