system.hh (8931:7a1dfb191e3f) system.hh (8948:e95ee70f876c)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 78 unchanged lines hidden (view full) ---

87 */
88 SystemPort(const std::string &_name, MemObject *_owner)
89 : MasterPort(_name, _owner)
90 { }
91 bool recvTiming(PacketPtr pkt)
92 { panic("SystemPort does not receive timing!\n"); return false; }
93 void recvRetry()
94 { panic("SystemPort does not expect retry!\n"); }
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 78 unchanged lines hidden (view full) ---

87 */
88 SystemPort(const std::string &_name, MemObject *_owner)
89 : MasterPort(_name, _owner)
90 { }
91 bool recvTiming(PacketPtr pkt)
92 { panic("SystemPort does not receive timing!\n"); return false; }
93 void recvRetry()
94 { panic("SystemPort does not expect retry!\n"); }
95 Tick recvAtomic(PacketPtr pkt)
96 { panic("SystemPort does not receive atomic!\n"); return 0; }
97 void recvFunctional(PacketPtr pkt)
98 { panic("SystemPort does not receive functional!\n"); }
99 };
100
101 SystemPort _systemPort;
102
103 public:
104
105 /**
106 * After all objects have been created and all ports are

--- 304 unchanged lines hidden --- 		95 };
96
97 SystemPort _systemPort;
98
99 public:
100
101 /**
102 * After all objects have been created and all ports are

--- 304 unchanged lines hidden ---