system.hh (8852:c744483edfcf) system.hh (8922:17f037ad8918)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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73{
74 private:
75
76 /**
77 * Private class for the system port which is only used as a
78 * master for debug access and for non-structural entities that do
79 * not have a port of their own.
80 */
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 64 unchanged lines hidden (view full) ---

73{
74 private:
75
76 /**
77 * Private class for the system port which is only used as a
78 * master for debug access and for non-structural entities that do
79 * not have a port of their own.
80 */
81 class SystemPort : public Port
81 class SystemPort : public MasterPort
82 {
83 public:
84
85 /**
86 * Create a system port with a name and an owner.
87 */
88 SystemPort(const std::string &_name, MemObject *_owner)
82 {
83 public:
84
85 /**
86 * Create a system port with a name and an owner.
87 */
88 SystemPort(const std::string &_name, MemObject *_owner)
89 : Port(_name, _owner)
89 : MasterPort(_name, _owner)
90 { }
91 bool recvTiming(PacketPtr pkt)
92 { panic("SystemPort does not receive timing!\n"); return false; }
90 { }
91 bool recvTiming(PacketPtr pkt)
92 { panic("SystemPort does not receive timing!\n"); return false; }
93 void recvRetry()
94 { panic("SystemPort does not expect retry!\n"); }
93 Tick recvAtomic(PacketPtr pkt)
94 { panic("SystemPort does not receive atomic!\n"); return 0; }
95 void recvFunctional(PacketPtr pkt)
96 { panic("SystemPort does not receive functional!\n"); }
95 Tick recvAtomic(PacketPtr pkt)
96 { panic("SystemPort does not receive atomic!\n"); return 0; }
97 void recvFunctional(PacketPtr pkt)
98 { panic("SystemPort does not receive functional!\n"); }
97
98 /**
99 * The system port is a master port connected to a single
100 * slave and thus do not care about what ranges the slave
101 * covers (as there is nothing to choose from).
102 */
103 void recvRangeChange() { }
104
105 };
106
107 SystemPort _systemPort;
108
109 public:
110
111 /**
112 * After all objects have been created and all ports are

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117 /**
118 * Get a reference to the system port that can be used by
119 * non-structural simulation objects like processes or threads, or
120 * external entities like loaders and debuggers, etc, to access
121 * the memory system.
122 *
123 * @return a reference to the system port we own
124 */
99 };
100
101 SystemPort _systemPort;
102
103 public:
104
105 /**
106 * After all objects have been created and all ports are

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111 /**
112 * Get a reference to the system port that can be used by
113 * non-structural simulation objects like processes or threads, or
114 * external entities like loaders and debuggers, etc, to access
115 * the memory system.
116 *
117 * @return a reference to the system port we own
118 */
125 Port& getSystemPort() { return _systemPort; }
119 MasterPort& getSystemPort() { return _systemPort; }
126
127 /**
128 * Additional function to return the Port of a memory object.
129 */
120
121 /**
122 * Additional function to return the Port of a memory object.
123 */
130 Port *getPort(const std::string &if_name, int idx = -1);
124 MasterPort& getMasterPort(const std::string &if_name, int idx = -1);
131
132 static const char *MemoryModeStrings[3];
133
134 Enums::MemoryMode
135 getMemoryMode()
136 {
137 assert(memoryMode);
138 return memoryMode;

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126 static const char *MemoryModeStrings[3];
127
128 Enums::MemoryMode
129 getMemoryMode()
130 {
131 assert(memoryMode);
132 return memoryMode;

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