system.hh (8798:adaa92be9037) system.hh (8799:dac1e33e07b0)
1/*
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2011 Regents of the University of California
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;

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39#include <vector>
40
41#include "base/loader/symtab.hh"
42#include "base/misc.hh"
43#include "base/statistics.hh"
44#include "cpu/pc_event.hh"
45#include "enums/MemoryMode.hh"
46#include "kern/system_events.hh"
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2011 Regents of the University of California
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;

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51#include <vector>
52
53#include "base/loader/symtab.hh"
54#include "base/misc.hh"
55#include "base/statistics.hh"
56#include "cpu/pc_event.hh"
57#include "enums/MemoryMode.hh"
58#include "kern/system_events.hh"
59#include "mem/mem_object.hh"
47#include "mem/port.hh"
48#include "params/System.hh"
60#include "mem/port.hh"
61#include "params/System.hh"
49#include "sim/sim_object.hh"
50
51class BaseCPU;
52class BaseRemoteGDB;
62
63class BaseCPU;
64class BaseRemoteGDB;
53class FunctionalPort;
65class FSTranslatingPortProxy;
54class GDBListener;
55class ObjectFile;
56class PhysicalMemory;
57class Platform;
66class GDBListener;
67class ObjectFile;
68class PhysicalMemory;
69class Platform;
70class PortProxy;
58class ThreadContext;
59class VirtualPort;
60
71class ThreadContext;
72class VirtualPort;
73
61class System : public SimObject
74class System : public MemObject
62{
75{
76 private:
77
78 /**
79 * Private class for the system port which is only used as a
80 * master for debug access and for non-structural entities that do
81 * not have a port of their own.
82 */
83 class SystemPort : public Port
84 {
85 public:
86
87 /**
88 * Create a system port with a name and an owner.
89 */
90 SystemPort(const std::string &_name, MemObject *_owner)
91 : Port(_name, _owner)
92 { }
93 bool recvTiming(PacketPtr pkt)
94 { panic("SystemPort does not receive timing!\n"); return false; }
95 Tick recvAtomic(PacketPtr pkt)
96 { panic("SystemPort does not receive atomic!\n"); return 0; }
97 void recvFunctional(PacketPtr pkt)
98 { panic("SystemPort does not receive functional!\n"); }
99
100 /**
101 * The system port is a master port connected to a single
102 * slave and thus do not care about what ranges the slave
103 * covers (as there is nothing to choose from).
104 */
105 void recvRangeChange() { }
106
107 };
108
109 SystemPort _systemPort;
110
63 public:
64
111 public:
112
113 /**
114 * After all objects have been created and all ports are
115 * connected, check that the system port is connected.
116 */
117 virtual void init();
118
119 /**
120 * Get a pointer to the system port that can be used by
121 * non-structural simulation objects like processes or threads, or
122 * external entities like loaders and debuggers, etc, to access
123 * the memory system.
124 *
125 * @return a pointer to the system port we own
126 */
127 Port* getSystemPort() { return &_systemPort; }
128
129 /**
130 * Additional function to return the Port of a memory object.
131 */
132 Port *getPort(const std::string &if_name, int idx = -1);
133
65 static const char *MemoryModeStrings[3];
66
67 Enums::MemoryMode
68 getMemoryMode()
69 {
70 assert(memoryMode);
71 return memoryMode;
72 }

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107 bool isMemory(const Addr addr) const;
108
109 Addr pagePtr;
110
111 uint64_t init_param;
112
113 /** Port to physical memory used for writing object files into ram at
114 * boot.*/
134 static const char *MemoryModeStrings[3];
135
136 Enums::MemoryMode
137 getMemoryMode()
138 {
139 assert(memoryMode);
140 return memoryMode;
141 }

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176 bool isMemory(const Addr addr) const;
177
178 Addr pagePtr;
179
180 uint64_t init_param;
181
182 /** Port to physical memory used for writing object files into ram at
183 * boot.*/
115 FunctionalPort *functionalPort;
116 VirtualPort *virtPort;
184 PortProxy* physProxy;
185 FSTranslatingPortProxy* virtProxy;
117
118 /** kernel symbol table */
119 SymbolTable *kernelSymtab;
120
121 /** Object pointer for the kernel code */
122 ObjectFile *kernel;
123
124 /** Begining of kernel code */

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187 /** kernel symbol table */
188 SymbolTable *kernelSymtab;
189
190 /** Object pointer for the kernel code */
191 ObjectFile *kernel;
192
193 /** Begining of kernel code */

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