system.hh (10913:38dbdeea7f1f) system.hh (11005:e7f403b6b76f)
1/*
2 * Copyright (c) 2012, 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 183 unchanged lines hidden (view full) ---

192
193#if THE_ISA != NULL_ISA
194 PCEventQueue pcEventQueue;
195#endif
196
197 std::vector<ThreadContext *> threadContexts;
198 int _numContexts;
199
1/*
2 * Copyright (c) 2012, 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 183 unchanged lines hidden (view full) ---

192
193#if THE_ISA != NULL_ISA
194 PCEventQueue pcEventQueue;
195#endif
196
197 std::vector<ThreadContext *> threadContexts;
198 int _numContexts;
199
200 ThreadContext *getThreadContext(ThreadID tid)
200 ThreadContext *getThreadContext(ContextID tid)
201 {
202 return threadContexts[tid];
203 }
204
205 int numContexts()
206 {
207 assert(_numContexts == (int)threadContexts.size());
208 return _numContexts;

--- 300 unchanged lines hidden (view full) ---

509 * @return entry point of the kernel code
510 */
511 Addr getKernelEntry() const { return kernelEntry; }
512
513 /// Allocate npages contiguous unused physical pages
514 /// @return Starting address of first page
515 Addr allocPhysPages(int npages);
516
201 {
202 return threadContexts[tid];
203 }
204
205 int numContexts()
206 {
207 assert(_numContexts == (int)threadContexts.size());
208 return _numContexts;

--- 300 unchanged lines hidden (view full) ---

509 * @return entry point of the kernel code
510 */
511 Addr getKernelEntry() const { return kernelEntry; }
512
513 /// Allocate npages contiguous unused physical pages
514 /// @return Starting address of first page
515 Addr allocPhysPages(int npages);
516
517 int registerThreadContext(ThreadContext *tc, int assigned=-1);
518 void replaceThreadContext(ThreadContext *tc, int context_id);
517 ContextID registerThreadContext(ThreadContext *tc,
518 ContextID assigned = InvalidContextID);
519 void replaceThreadContext(ThreadContext *tc, ContextID context_id);
519
520 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
521 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
522
523 void drainResume() M5_ATTR_OVERRIDE;
524
525 public:
526 Counter totalNumInsts;

--- 43 unchanged lines hidden --- 		520
521 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
522 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
523
524 void drainResume() M5_ATTR_OVERRIDE;
525
526 public:
527 Counter totalNumInsts;

--- 43 unchanged lines hidden ---