1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2011 Regents of the University of California
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Steve Reinhardt
30 * Lisa Hsu
31 * Nathan Binkert
32 * Rick Strong
33 */
34
35#ifndef __SYSTEM_HH__
36#define __SYSTEM_HH__
37
38#include <string>
39#include <vector>
40
41#include "base/loader/symtab.hh"
42#include "base/misc.hh"
43#include "base/statistics.hh"
44#include "config/full_system.hh"
45#include "cpu/pc_event.hh"
46#include "enums/MemoryMode.hh"
59#include "mem/mem_object.hh"
47#include "mem/port.hh"
48#include "params/System.hh"
49#include "sim/sim_object.hh"
50
51#if FULL_SYSTEM
52#include "kern/system_events.hh"
53#endif
54
55class BaseCPU;
56class ThreadContext;
57class ObjectFile;
58class PhysicalMemory;
59
60#if FULL_SYSTEM
61class Platform;
74class PortProxy;
75class FSTranslatingPortProxy;
62class FunctionalPort;
63class VirtualPort;
64#endif
65class GDBListener;
66class BaseRemoteGDB;
67
80class System : public MemObject
68class System : public SimObject
69{
82 private:
83
84 /**
85 * Private class for the system port which is only used as a
86 * master for debug access and for non-structural entities that do
87 * not have a port of their own.
88 */
89 class SystemPort : public Port
90 {
91 public:
92
93 /**
94 * Create a system port with a name and an owner.
95 */
96 SystemPort(const std::string &_name, MemObject *_owner)
97 : Port(_name, _owner)
98 { }
99 bool recvTiming(PacketPtr pkt)
100 { panic("SystemPort does not receive timing!\n"); return false; }
101 Tick recvAtomic(PacketPtr pkt)
102 { panic("SystemPort does not receive atomic!\n"); return 0; }
103 void recvFunctional(PacketPtr pkt)
104 { panic("SystemPort does not receive functional!\n"); }
105
106 /**
107 * The system port is a master port connected to a single
108 * slave and thus do not care about what ranges the slave
109 * covers (as there is nothing to choose from).
110 */
111 void recvRangeChange() { }
112
113 };
114
115 SystemPort _systemPort;
116
70 public:
71
119 /**
120 * After all objects have been created and all ports are
121 * connected, check that the system port is connected.
122 */
123 virtual void init();
124
125 /**
126 * Get a pointer to the system port that can be used by
127 * non-structural simulation objects like processes or threads, or
128 * external entities like loaders and debuggers, etc, to access
129 * the memory system.
130 *
131 * @return a pointer to the system port we own
132 */
133 Port* getSystemPort() { return &_systemPort; }
134
135 /**
136 * Additional function to return the Port of a memory object.
137 */
138 Port *getPort(const std::string &if_name, int idx = -1);
139
72 static const char *MemoryModeStrings[3];
73
74 Enums::MemoryMode
75 getMemoryMode()
76 {
77 assert(memoryMode);
78 return memoryMode;
79 }
80
81 /** Change the memory mode of the system. This should only be called by the
82 * python!!
83 * @param mode Mode to change to (atomic/timing)
84 */
85 void setMemoryMode(Enums::MemoryMode mode);
86
87 PhysicalMemory *physmem;
88 PCEventQueue pcEventQueue;
89
90 std::vector<ThreadContext *> threadContexts;
91 int _numContexts;
92
93 ThreadContext *getThreadContext(ThreadID tid)
94 {
95 return threadContexts[tid];
96 }
97
98 int numContexts()
99 {
100 assert(_numContexts == (int)threadContexts.size());
101 return _numContexts;
102 }
103
104 /** Return number of running (non-halted) thread contexts in
105 * system. These threads could be Active or Suspended. */
106 int numRunningContexts();
107
108 /** List to store ranges of memories in this system */
109 AddrRangeList memRanges;
110
111 /** check if an address points to valid system memory
112 * and thus we can fetch instructions out of it
113 */
114 bool isMemory(const Addr addr) const;
115
116#if FULL_SYSTEM
185 Platform *platform;
117 uint64_t init_param;
118
119 /** Port to physical memory used for writing object files into ram at
120 * boot.*/
190 PortProxy* physProxy;
191 FSTranslatingPortProxy* virtProxy;
121 FunctionalPort *functionalPort;
122 VirtualPort *virtPort;
123
124 /** kernel symbol table */
125 SymbolTable *kernelSymtab;
126
127 /** Object pointer for the kernel code */
128 ObjectFile *kernel;
129
130 /** Begining of kernel code */
131 Addr kernelStart;
132
133 /** End of kernel code */
134 Addr kernelEnd;
135
136 /** Entry point in the kernel to start at */
137 Addr kernelEntry;
138
139 /** Mask that should be anded for binary/symbol loading.
140 * This allows one two different OS requirements for the same ISA to be
141 * handled. Some OSes are compiled for a virtual address and need to be
142 * loaded into physical memory that starts at address 0, while other
143 * bare metal tools generate images that start at address 0.
144 */
145 Addr loadAddrMask;
146
147#else
148
149 Addr pagePtr;
150
151 protected:
152 uint64_t nextPID;
153
154 public:
155 uint64_t allocatePID()
156 {
157 return nextPID++;
158 }
159
160 /** Amount of physical memory that is still free */
161 Addr freeMemSize();
162
163 /** Amount of physical memory that exists */
164 Addr memSize();
165
166
167#endif // FULL_SYSTEM
168
169 protected:
170 Enums::MemoryMode memoryMode;
171 uint64_t workItemsBegin;
172 uint64_t workItemsEnd;
242 uint32_t numWorkIds;
173 std::vector<bool> activeCpus;
174
175 public:
246 virtual void regStats();
176 /**
177 * Called by pseudo_inst to track the number of work items started by this
178 * system.
179 */
251 uint64_t
180 uint64_t
181 incWorkItemsBegin()
182 {
183 return ++workItemsBegin;
184 }
185
186 /**
187 * Called by pseudo_inst to track the number of work items completed by
188 * this system.
189 */
190 uint64_t
191 incWorkItemsEnd()
192 {
193 return ++workItemsEnd;
194 }
195
196 /**
197 * Called by pseudo_inst to mark the cpus actively executing work items.
198 * Returns the total number of cpus that have executed work item begin or
199 * ends.
200 */
201 int
202 markWorkItem(int index)
203 {
204 int count = 0;
205 assert(index < activeCpus.size());
206 activeCpus[index] = true;
207 for (std::vector<bool>::iterator i = activeCpus.begin();
208 i < activeCpus.end(); i++) {
209 if (*i) count++;
210 }
211 return count;
212 }
213
285 inline void workItemBegin(uint32_t tid, uint32_t workid)
286 {
287 std::pair<uint32_t,uint32_t> p(tid, workid);
288 lastWorkItemStarted[p] = curTick();
289 }
290
291 void workItemEnd(uint32_t tid, uint32_t workid);
292
214#if FULL_SYSTEM
215 /**
216 * Fix up an address used to match PCs for hooking simulator
217 * events on to target function executions. See comment in
218 * system.cc for details.
219 */
220 virtual Addr fixFuncEventAddr(Addr addr) = 0;
221
222 /**
223 * Add a function-based event to the given function, to be looked
224 * up in the specified symbol table.
225 */
226 template <class T>
227 T *addFuncEvent(SymbolTable *symtab, const char *lbl)
228 {
229 Addr addr = 0; // initialize only to avoid compiler warning
230
231 if (symtab->findAddress(lbl, addr)) {
232 T *ev = new T(&pcEventQueue, lbl, fixFuncEventAddr(addr));
233 return ev;
234 }
235
236 return NULL;
237 }
238
239 /** Add a function-based event to kernel code. */
240 template <class T>
241 T *addKernelFuncEvent(const char *lbl)
242 {
243 return addFuncEvent<T>(kernelSymtab, lbl);
244 }
245
246#endif
247 public:
248 std::vector<BaseRemoteGDB *> remoteGDB;
249 std::vector<GDBListener *> gdbListen;
250 bool breakpoint();
251
252 public:
253 typedef SystemParams Params;
254
255 protected:
256 Params *_params;
257
258 public:
259 System(Params *p);
260 ~System();
261
262 void initState();
263
264 const Params *params() const { return (const Params *)_params; }
265
266 public:
267
268#if FULL_SYSTEM
269 /**
270 * Returns the addess the kernel starts at.
271 * @return address the kernel starts at
272 */
273 Addr getKernelStart() const { return kernelStart; }
274
275 /**
276 * Returns the addess the kernel ends at.
277 * @return address the kernel ends at
278 */
279 Addr getKernelEnd() const { return kernelEnd; }
280
281 /**
282 * Returns the addess the entry point to the kernel code.
283 * @return entry point of the kernel code
284 */
285 Addr getKernelEntry() const { return kernelEntry; }
286
287#else
288
368 /// Allocate npages contiguous unused physical pages
369 /// @return Starting address of first page
370 Addr allocPhysPages(int npages);
289 Addr new_page();
290
291#endif // FULL_SYSTEM
292
293 int registerThreadContext(ThreadContext *tc, int assigned=-1);
294 void replaceThreadContext(ThreadContext *tc, int context_id);
295
296 void serialize(std::ostream &os);
297 void unserialize(Checkpoint *cp, const std::string &section);
298 virtual void resume();
299
300 public:
301 Counter totalNumInsts;
302 EventQueue instEventQueue;
384 std::map<std::pair<uint32_t,uint32_t>, Tick> lastWorkItemStarted;
385 std::map<uint32_t, Stats::Histogram*> workItemStats;
303
304 ////////////////////////////////////////////
305 //
306 // STATIC GLOBAL SYSTEM LIST
307 //
308 ////////////////////////////////////////////
309
310 static std::vector<System *> systemList;
311 static int numSystemsRunning;
312
313 static void printSystems();
314
315
316};
317
318#endif // __SYSTEM_HH__