| 1/* 2 * Copyright (c) 2012, 2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 279 unchanged lines hidden (view full) --- 288 */ 289 Addr getPageBytes() const { return TheISA::PageBytes; } 290 291 /** 292 * Get the number of bits worth of in-page adress for the ISA. 293 */ 294 Addr getPageShift() const { return TheISA::PageShift; } 295 |
| 296 /** 297 * The thermal model used for this system (if any). 298 */ 299 ThermalModel * getThermalModel() const { return thermalModel; } 300 |
| 301 protected: 302 303 PhysicalMemory physmem; 304 305 Enums::MemoryMode memoryMode; 306 307 const unsigned int _cacheLineSize; 308 --- 4 unchanged lines hidden (view full) --- 313 314 /** This array is a per-sytem list of all devices capable of issuing a 315 * memory system request and an associated string for each master id. 316 * It's used to uniquely id any master in the system by name for things 317 * like cache statistics. 318 */ 319 std::vector<std::string> masterIds; 320 |
| 321 ThermalModel * thermalModel; 322 |
| 323 public: 324 325 /** Request an id used to create a request object in the system. All objects 326 * that intend to issues requests into the memory system must request an id 327 * in the init() phase of startup. All master ids must be fixed by the 328 * regStats() phase that immediately preceeds it. This allows objects in the 329 * memory system to understand how many masters may exist and 330 * appropriately name the bins of their per-master stats before the stats --- 248 unchanged lines hidden --- |