1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2011 Regents of the University of California
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Steve Reinhardt
42 * Lisa Hsu
43 * Nathan Binkert
44 * Rick Strong
45 */
46
47#ifndef __SYSTEM_HH__
48#define __SYSTEM_HH__
49
50#include <string>
51#include <vector>
52
53#include "base/loader/symtab.hh"
54#include "base/misc.hh"
55#include "base/statistics.hh"
56#include "cpu/pc_event.hh"
57#include "enums/MemoryMode.hh"
58#include "kern/system_events.hh"
59#include "mem/fs_translating_port_proxy.hh"
60#include "mem/mem_object.hh"
61#include "mem/port.hh"
62#include "mem/physical.hh"
63#include "params/System.hh"
64
65class BaseCPU;
66class BaseRemoteGDB;
67class GDBListener;
68class ObjectFile;
69class Platform;
70class ThreadContext;
71
72class System : public MemObject
73{
74 private:
75
76 /**
77 * Private class for the system port which is only used as a
78 * master for debug access and for non-structural entities that do
79 * not have a port of their own.
80 */
81 class SystemPort : public MasterPort
82 {
83 public:
84
85 /**
86 * Create a system port with a name and an owner.
87 */
88 SystemPort(const std::string &_name, MemObject *_owner)
89 : MasterPort(_name, _owner)
90 { }
91 bool recvTiming(PacketPtr pkt)
92 { panic("SystemPort does not receive timing!\n"); return false; }
93 void recvRetry()
94 { panic("SystemPort does not expect retry!\n"); }
95 Tick recvAtomic(PacketPtr pkt)
96 { panic("SystemPort does not receive atomic!\n"); return 0; }
97 void recvFunctional(PacketPtr pkt)
98 { panic("SystemPort does not receive functional!\n"); }
99 };
100
101 SystemPort _systemPort;
102
103 public:
104
105 /**
106 * After all objects have been created and all ports are
107 * connected, check that the system port is connected.
108 */
109 virtual void init();
110
111 /**
112 * Get a reference to the system port that can be used by
113 * non-structural simulation objects like processes or threads, or
114 * external entities like loaders and debuggers, etc, to access
115 * the memory system.
116 *
117 * @return a reference to the system port we own
118 */
119 MasterPort& getSystemPort() { return _systemPort; }
120
121 /**
122 * Additional function to return the Port of a memory object.
123 */
124 MasterPort& getMasterPort(const std::string &if_name, int idx = -1);
125
126 static const char *MemoryModeStrings[3];
127
128 Enums::MemoryMode
129 getMemoryMode()
130 {
131 assert(memoryMode);
132 return memoryMode;
133 }
134
135 /** Change the memory mode of the system. This should only be called by the
136 * python!!
137 * @param mode Mode to change to (atomic/timing)
138 */
139 void setMemoryMode(Enums::MemoryMode mode);
140
141 PCEventQueue pcEventQueue;
142
143 std::vector<ThreadContext *> threadContexts;
144 int _numContexts;
145
146 ThreadContext *getThreadContext(ThreadID tid)
147 {
148 return threadContexts[tid];
149 }
150
151 int numContexts()
152 {
153 assert(_numContexts == (int)threadContexts.size());
154 return _numContexts;
155 }
156
157 /** Return number of running (non-halted) thread contexts in
158 * system. These threads could be Active or Suspended. */
159 int numRunningContexts();
160
161 Addr pagePtr;
162
163 uint64_t init_param;
164
165 /** Port to physical memory used for writing object files into ram at
166 * boot.*/
167 PortProxy physProxy;
168 FSTranslatingPortProxy virtProxy;
169
170 /** kernel symbol table */
171 SymbolTable *kernelSymtab;
172
173 /** Object pointer for the kernel code */
174 ObjectFile *kernel;
175
176 /** Begining of kernel code */
177 Addr kernelStart;
178
179 /** End of kernel code */
180 Addr kernelEnd;
181
182 /** Entry point in the kernel to start at */
183 Addr kernelEntry;
184
185 /** Mask that should be anded for binary/symbol loading.
186 * This allows one two different OS requirements for the same ISA to be
187 * handled. Some OSes are compiled for a virtual address and need to be
188 * loaded into physical memory that starts at address 0, while other
189 * bare metal tools generate images that start at address 0.
190 */
191 Addr loadAddrMask;
192
193 protected:
194 uint64_t nextPID;
195
196 public:
197 uint64_t allocatePID()
198 {
199 return nextPID++;
200 }
201
202 /** Get a pointer to access the physical memory of the system */
203 PhysicalMemory& getPhysMem() { return physmem; }
204
205 /** Amount of physical memory that is still free */
206 Addr freeMemSize() const;
207
208 /** Amount of physical memory that exists */
209 Addr memSize() const;
210
211 /**
212 * Check if a physical address is within a range of a memory that
213 * is part of the global address map.
214 *
215 * @param addr A physical address
216 * @return Whether the address corresponds to a memory
217 */
218 bool isMemAddr(Addr addr) const;
219
220 protected:
221
222 PhysicalMemory physmem;
223
224 Enums::MemoryMode memoryMode;
225 uint64_t workItemsBegin;
226 uint64_t workItemsEnd;
227 uint32_t numWorkIds;
228 std::vector<bool> activeCpus;
229
230 /** This array is a per-sytem list of all devices capable of issuing a
231 * memory system request and an associated string for each master id.
232 * It's used to uniquely id any master in the system by name for things
233 * like cache statistics.
234 */
235 std::vector<std::string> masterIds;
236
237 public:
238
239 /** Request an id used to create a request object in the system. All objects
240 * that intend to issues requests into the memory system must request an id
241 * in the init() phase of startup. All master ids must be fixed by the
242 * regStats() phase that immediately preceeds it. This allows objects in the
243 * memory system to understand how many masters may exist and
244 * appropriately name the bins of their per-master stats before the stats
245 * are finalized
246 */
247 MasterID getMasterId(std::string req_name);
248
249 /** Get the name of an object for a given request id.
250 */
251 std::string getMasterName(MasterID master_id);
252
253 /** Get the number of masters registered in the system */
254 MasterID maxMasters()
255 {
256 return masterIds.size();
257 }
258
259 virtual void regStats();
260 /**
261 * Called by pseudo_inst to track the number of work items started by this
262 * system.
263 */
264 uint64_t
265 incWorkItemsBegin()
266 {
267 return ++workItemsBegin;
268 }
269
270 /**
271 * Called by pseudo_inst to track the number of work items completed by
272 * this system.
273 */
274 uint64_t
275 incWorkItemsEnd()
276 {
277 return ++workItemsEnd;
278 }
279
280 /**
281 * Called by pseudo_inst to mark the cpus actively executing work items.
282 * Returns the total number of cpus that have executed work item begin or
283 * ends.
284 */
285 int
286 markWorkItem(int index)
287 {
288 int count = 0;
289 assert(index < activeCpus.size());
290 activeCpus[index] = true;
291 for (std::vector<bool>::iterator i = activeCpus.begin();
292 i < activeCpus.end(); i++) {
293 if (*i) count++;
294 }
295 return count;
296 }
297
298 inline void workItemBegin(uint32_t tid, uint32_t workid)
299 {
300 std::pair<uint32_t,uint32_t> p(tid, workid);
301 lastWorkItemStarted[p] = curTick();
302 }
303
304 void workItemEnd(uint32_t tid, uint32_t workid);
305
306 /**
307 * Fix up an address used to match PCs for hooking simulator
308 * events on to target function executions. See comment in
309 * system.cc for details.
310 */
311 virtual Addr fixFuncEventAddr(Addr addr)
312 {
313 panic("Base fixFuncEventAddr not implemented.\n");
314 }
315
316 /**
317 * Add a function-based event to the given function, to be looked
318 * up in the specified symbol table.
319 */
320 template <class T>
321 T *addFuncEvent(SymbolTable *symtab, const char *lbl)
322 {
323 Addr addr = 0; // initialize only to avoid compiler warning
324
325 if (symtab->findAddress(lbl, addr)) {
326 T *ev = new T(&pcEventQueue, lbl, fixFuncEventAddr(addr));
327 return ev;
328 }
329
330 return NULL;
331 }
332
333 /** Add a function-based event to kernel code. */
334 template <class T>
335 T *addKernelFuncEvent(const char *lbl)
336 {
337 return addFuncEvent<T>(kernelSymtab, lbl);
338 }
339
340 public:
341 std::vector<BaseRemoteGDB *> remoteGDB;
342 std::vector<GDBListener *> gdbListen;
343 bool breakpoint();
344
345 public:
346 typedef SystemParams Params;
347
348 protected:
349 Params *_params;
350
351 public:
352 System(Params *p);
353 ~System();
354
355 void initState();
356
357 const Params *params() const { return (const Params *)_params; }
358
359 public:
360
361 /**
362 * Returns the addess the kernel starts at.
363 * @return address the kernel starts at
364 */
365 Addr getKernelStart() const { return kernelStart; }
366
367 /**
368 * Returns the addess the kernel ends at.
369 * @return address the kernel ends at
370 */
371 Addr getKernelEnd() const { return kernelEnd; }
372
373 /**
374 * Returns the addess the entry point to the kernel code.
375 * @return entry point of the kernel code
376 */
377 Addr getKernelEntry() const { return kernelEntry; }
378
379 /// Allocate npages contiguous unused physical pages
380 /// @return Starting address of first page
381 Addr allocPhysPages(int npages);
382
383 int registerThreadContext(ThreadContext *tc, int assigned=-1);
384 void replaceThreadContext(ThreadContext *tc, int context_id);
385
386 void serialize(std::ostream &os);
387 void unserialize(Checkpoint *cp, const std::string &section);
388 virtual void resume();
389
390 public:
391 Counter totalNumInsts;
392 EventQueue instEventQueue;
393 std::map<std::pair<uint32_t,uint32_t>, Tick> lastWorkItemStarted;
394 std::map<uint32_t, Stats::Histogram*> workItemStats;
395
396 ////////////////////////////////////////////
397 //
398 // STATIC GLOBAL SYSTEM LIST
399 //
400 ////////////////////////////////////////////
401
402 static std::vector<System *> systemList;
403 static int numSystemsRunning;
404
405 static void printSystems();
406
407
408};
409
410#endif // __SYSTEM_HH__