1/*
2 * Copyright (c) 2012, 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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288 */
289 Addr getPageBytes() const { return TheISA::PageBytes; }
290
291 /**
292 * Get the number of bits worth of in-page adress for the ISA.
293 */
294 Addr getPageShift() const { return TheISA::PageShift; }
295
296 protected:
297
298 PhysicalMemory physmem;
299
300 Enums::MemoryMode memoryMode;
301
302 const unsigned int _cacheLineSize;
303

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308
309 /** This array is a per-sytem list of all devices capable of issuing a
310 * memory system request and an associated string for each master id.
311 * It's used to uniquely id any master in the system by name for things
312 * like cache statistics.
313 */
314 std::vector<std::string> masterIds;
315
316 public:
317
318 /** Request an id used to create a request object in the system. All objects
319 * that intend to issues requests into the memory system must request an id
320 * in the init() phase of startup. All master ids must be fixed by the
321 * regStats() phase that immediately preceeds it. This allows objects in the
322 * memory system to understand how many masters may exist and
323 * appropriately name the bins of their per-master stats before the stats

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