stat_control.cc (7768:cdb18c1b51ea) stat_control.cc (7811:a8fc35183c10)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 */
30
31// This file will contain default statistics for the simulator that
32// don't really belong to a specific simulator object
33
34#include <fstream>
35#include <iostream>
36#include <list>
37
38#include "base/callback.hh"
39#include "base/hostinfo.hh"
40#include "base/statistics.hh"
41#include "base/time.hh"
42
43#include "config/the_isa.hh"
44#if THE_ISA == NO_ISA
45#include "arch/noisa/cpu_dummy.hh"
46#else
47#include "cpu/base.hh"
48#endif
49
50#include "sim/eventq.hh"
51
52using namespace std;
53
54Stats::Formula simSeconds;
55Stats::Value simTicks;
56Stats::Value simFreq;
57
58namespace Stats {
59
60Time statTime(true);
61Tick startTick;
62
63struct SimTicksReset : public Callback
64{
65 void process()
66 {
67 statTime.set();
68 startTick = curTick;
69 }
70};
71
72double
73statElapsedTime()
74{
75 Time now(true);
76 Time elapsed = now - statTime;
77 return elapsed();
78}
79
80Tick
81statElapsedTicks()
82{
83 return curTick - startTick;
84}
85
86SimTicksReset simTicksReset;
87
88struct Global
89{
90 Stats::Formula hostInstRate;
91 Stats::Formula hostTickRate;
92 Stats::Value hostMemory;
93 Stats::Value hostSeconds;
94
95 Stats::Value simInsts;
96
97 Global();
98};
99
100Global::Global()
101{
102 simInsts
103 .functor(BaseCPU::numSimulatedInstructions)
104 .name("sim_insts")
105 .desc("Number of instructions simulated")
106 .precision(0)
107 .prereq(simInsts)
108 ;
109
110 simSeconds
111 .name("sim_seconds")
112 .desc("Number of seconds simulated")
113 ;
114
115 simFreq
116 .scalar(SimClock::Frequency)
117 .name("sim_freq")
118 .desc("Frequency of simulated ticks")
119 ;
120
121 simTicks
122 .functor(statElapsedTicks)
123 .name("sim_ticks")
124 .desc("Number of ticks simulated")
125 ;
126
127 hostInstRate
128 .name("host_inst_rate")
129 .desc("Simulator instruction rate (inst/s)")
130 .precision(0)
131 .prereq(simInsts)
132 ;
133
134 hostMemory
135 .functor(memUsage)
136 .name("host_mem_usage")
137 .desc("Number of bytes of host memory used")
138 .prereq(hostMemory)
139 ;
140
141 hostSeconds
142 .functor(statElapsedTime)
143 .name("host_seconds")
144 .desc("Real time elapsed on the host")
145 .precision(2)
146 ;
147
148 hostTickRate
149 .name("host_tick_rate")
150 .desc("Simulator tick rate (ticks/s)")
151 .precision(0)
152 ;
153
154 simSeconds = simTicks / simFreq;
155 hostInstRate = simInsts / hostSeconds;
156 hostTickRate = simTicks / hostSeconds;
157
158 registerResetCallback(&simTicksReset);
159}
160
161void
162initSimStats()
163{
164 static Global global;
165}
166
167class _StatEvent : public Event
168{
169 private:
170 bool dump;
171 bool reset;
172 Tick repeat;
173
174 public:
175 _StatEvent(bool _dump, bool _reset, Tick _repeat)
176 : Event(Stat_Event_Pri), dump(_dump), reset(_reset), repeat(_repeat)
177 {
178 setFlags(AutoDelete);
179 }
180
181 virtual void
182 process()
183 {
184 if (dump)
185 Stats::dump();
186
187 if (reset)
188 Stats::reset();
189
190 if (repeat) {
191 Event *event = new _StatEvent(dump, reset, repeat);
192 mainEventQueue.schedule(event, curTick + repeat);
193 }
194 }
195};
196
197void
198StatEvent(bool dump, bool reset, Tick when, Tick repeat)
199{
200 Event *event = new _StatEvent(dump, reset, repeat);
201 mainEventQueue.schedule(event, when);
202}
203
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 */
30
31// This file will contain default statistics for the simulator that
32// don't really belong to a specific simulator object
33
34#include <fstream>
35#include <iostream>
36#include <list>
37
38#include "base/callback.hh"
39#include "base/hostinfo.hh"
40#include "base/statistics.hh"
41#include "base/time.hh"
42
43#include "config/the_isa.hh"
44#if THE_ISA == NO_ISA
45#include "arch/noisa/cpu_dummy.hh"
46#else
47#include "cpu/base.hh"
48#endif
49
50#include "sim/eventq.hh"
51
52using namespace std;
53
54Stats::Formula simSeconds;
55Stats::Value simTicks;
56Stats::Value simFreq;
57
58namespace Stats {
59
60Time statTime(true);
61Tick startTick;
62
63struct SimTicksReset : public Callback
64{
65 void process()
66 {
67 statTime.set();
68 startTick = curTick;
69 }
70};
71
72double
73statElapsedTime()
74{
75 Time now(true);
76 Time elapsed = now - statTime;
77 return elapsed();
78}
79
80Tick
81statElapsedTicks()
82{
83 return curTick - startTick;
84}
85
86SimTicksReset simTicksReset;
87
88struct Global
89{
90 Stats::Formula hostInstRate;
91 Stats::Formula hostTickRate;
92 Stats::Value hostMemory;
93 Stats::Value hostSeconds;
94
95 Stats::Value simInsts;
96
97 Global();
98};
99
100Global::Global()
101{
102 simInsts
103 .functor(BaseCPU::numSimulatedInstructions)
104 .name("sim_insts")
105 .desc("Number of instructions simulated")
106 .precision(0)
107 .prereq(simInsts)
108 ;
109
110 simSeconds
111 .name("sim_seconds")
112 .desc("Number of seconds simulated")
113 ;
114
115 simFreq
116 .scalar(SimClock::Frequency)
117 .name("sim_freq")
118 .desc("Frequency of simulated ticks")
119 ;
120
121 simTicks
122 .functor(statElapsedTicks)
123 .name("sim_ticks")
124 .desc("Number of ticks simulated")
125 ;
126
127 hostInstRate
128 .name("host_inst_rate")
129 .desc("Simulator instruction rate (inst/s)")
130 .precision(0)
131 .prereq(simInsts)
132 ;
133
134 hostMemory
135 .functor(memUsage)
136 .name("host_mem_usage")
137 .desc("Number of bytes of host memory used")
138 .prereq(hostMemory)
139 ;
140
141 hostSeconds
142 .functor(statElapsedTime)
143 .name("host_seconds")
144 .desc("Real time elapsed on the host")
145 .precision(2)
146 ;
147
148 hostTickRate
149 .name("host_tick_rate")
150 .desc("Simulator tick rate (ticks/s)")
151 .precision(0)
152 ;
153
154 simSeconds = simTicks / simFreq;
155 hostInstRate = simInsts / hostSeconds;
156 hostTickRate = simTicks / hostSeconds;
157
158 registerResetCallback(&simTicksReset);
159}
160
161void
162initSimStats()
163{
164 static Global global;
165}
166
167class _StatEvent : public Event
168{
169 private:
170 bool dump;
171 bool reset;
172 Tick repeat;
173
174 public:
175 _StatEvent(bool _dump, bool _reset, Tick _repeat)
176 : Event(Stat_Event_Pri), dump(_dump), reset(_reset), repeat(_repeat)
177 {
178 setFlags(AutoDelete);
179 }
180
181 virtual void
182 process()
183 {
184 if (dump)
185 Stats::dump();
186
187 if (reset)
188 Stats::reset();
189
190 if (repeat) {
191 Event *event = new _StatEvent(dump, reset, repeat);
192 mainEventQueue.schedule(event, curTick + repeat);
193 }
194 }
195};
196
197void
198StatEvent(bool dump, bool reset, Tick when, Tick repeat)
199{
200 Event *event = new _StatEvent(dump, reset, repeat);
201 mainEventQueue.schedule(event, when);
202}
203
204/* namespace Stats */ }
204} // namespace Stats