sim_object.hh (10905:a6ca6831e775) sim_object.hh (10911:0ca18446a5bb)
1/*
1/*
2 * Copyright (c) 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * Copyright (c) 2010 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;

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170
171 /**
172 * Provide a default implementation of the drain interface that
173 * simply returns 0 (draining completed) and sets the drain state
174 * to Drained.
175 */
176 unsigned int drain(DrainManager *drainManger);
177
14 * Copyright (c) 2001-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;

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182
183 /**
184 * Provide a default implementation of the drain interface that
185 * simply returns 0 (draining completed) and sets the drain state
186 * to Drained.
187 */
188 unsigned int drain(DrainManager *drainManger);
189
190 /**
191 * Write back dirty buffers to memory using functional writes.
192 *
193 * After returning, an object implementing this method should have
194 * written all its dirty data back to memory. This method is
195 * typically used to prepare a system with caches for
196 * checkpointing.
197 */
198 virtual void memWriteback() {};
178
199
200 /**
201 * Invalidate the contents of memory buffers.
202 *
203 * When the switching to hardware virtualized CPU models, we need
204 * to make sure that we don't have any cached state in the system
205 * that might become stale when we return. This method is used to
206 * flush all such state back to main memory.
207 *
208 * @warn This does <i>not</i> cause any dirty state to be written
209 * back to memory.
210 */
211 virtual void memInvalidate() {};
212
179 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE {};
180 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE {};
181
182 /**
183 * Serialize all SimObjects in the system.
184 */
185 static void serializeAll(CheckpointOut &cp);
186

--- 19 unchanged lines hidden --- 		213 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE {};
214 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE {};
215
216 /**
217 * Serialize all SimObjects in the system.
218 */
219 static void serializeAll(CheckpointOut &cp);
220

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