sim_object.cc (2816:776562207565) sim_object.cc (2839:d5dd8a3cdea0)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 257 unchanged lines hidden (view full) ---

266void
267SimObject::recordEvent(const std::string &stat)
268{
269 if (doRecordEvent)
270 Stats::recordEvent(stat);
271}
272
273bool
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 257 unchanged lines hidden (view full) ---

266void
267SimObject::recordEvent(const std::string &stat)
268{
269 if (doRecordEvent)
270 Stats::recordEvent(stat);
271}
272
273bool
274SimObject::quiesce(Event *quiesce_event)
274SimObject::drain(Event *drain_event)
275{
275{
276 if (state != QuiescedAtomic && state != Atomic) {
277 panic("Must implement your own quiesce function if it is to be used "
276 if (state != DrainedAtomic && state != Atomic) {
277 panic("Must implement your own drain function if it is to be used "
278 "in timing mode!");
279 }
278 "in timing mode!");
279 }
280 state = QuiescedAtomic;
280 state = DrainedAtomic;
281 return false;
282}
283
284void
285SimObject::resume()
286{
281 return false;
282}
283
284void
285SimObject::resume()
286{
287 if (state == QuiescedAtomic) {
287 if (state == DrainedAtomic) {
288 state = Atomic;
288 state = Atomic;
289 } else if (state == QuiescedTiming) {
289 } else if (state == DrainedTiming) {
290 state = Timing;
291 }
292}
293
294void
295SimObject::setMemoryMode(State new_mode)
296{
297 assert(new_mode == Timing || new_mode == Atomic);
290 state = Timing;
291 }
292}
293
294void
295SimObject::setMemoryMode(State new_mode)
296{
297 assert(new_mode == Timing || new_mode == Atomic);
298 if (state == QuiescedAtomic && new_mode == Timing) {
299 state = QuiescedTiming;
300 } else if (state == QuiescedTiming && new_mode == Atomic) {
301 state = QuiescedAtomic;
298 if (state == DrainedAtomic && new_mode == Timing) {
299 state = DrainedTiming;
300 } else if (state == DrainedTiming && new_mode == Atomic) {
301 state = DrainedAtomic;
302 } else {
303 state = new_mode;
304 }
305}
306
307void
308SimObject::switchOut()
309{
310 panic("Unimplemented!");
311}
312
313void
314SimObject::takeOverFrom(BaseCPU *cpu)
315{
316 panic("Unimplemented!");
317}
318
319DEFINE_SIM_OBJECT_CLASS_NAME("SimObject", SimObject)
302 } else {
303 state = new_mode;
304 }
305}
306
307void
308SimObject::switchOut()
309{
310 panic("Unimplemented!");
311}
312
313void
314SimObject::takeOverFrom(BaseCPU *cpu)
315{
316 panic("Unimplemented!");
317}
318
319DEFINE_SIM_OBJECT_CLASS_NAME("SimObject", SimObject)