sim_object.cc (9253:e0d2a8e9f445) sim_object.cc (9254:f1b35c618252)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * Copyright (c) 2010 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Steve Reinhardt
30 * Nathan Binkert
31 */
32
33#include <cassert>
34
35#include "base/callback.hh"
36#include "base/inifile.hh"
37#include "base/match.hh"
38#include "base/misc.hh"
39#include "base/trace.hh"
40#include "base/types.hh"
41#include "debug/Checkpoint.hh"
42#include "sim/sim_object.hh"
43#include "sim/stats.hh"
44
45using namespace std;
46
47
48////////////////////////////////////////////////////////////////////////
49//
50// SimObject member definitions
51//
52////////////////////////////////////////////////////////////////////////
53
54//
55// static list of all SimObjects, used for initialization etc.
56//
57SimObject::SimObjectList SimObject::simObjectList;
58
59//
60// SimObject constructor: used to maintain static simObjectList
61//
62SimObject::SimObject(const Params *p)
63 : EventManager(p->eventq), _params(p)
64{
65#ifdef DEBUG
66 doDebugBreak = false;
67#endif
68
69 simObjectList.push_back(this);
70 state = Running;
71}
72
73void
74SimObject::init()
75{
76}
77
78void
79SimObject::loadState(Checkpoint *cp)
80{
81 if (cp->sectionExists(name())) {
82 DPRINTF(Checkpoint, "unserializing\n");
83 unserialize(cp, name());
84 } else {
85 DPRINTF(Checkpoint, "no checkpoint section found\n");
86 }
87}
88
89void
90SimObject::initState()
91{
92}
93
94void
95SimObject::startup()
96{
97}
98
99//
100// no default statistics, so nothing to do in base implementation
101//
102void
103SimObject::regStats()
104{
105}
106
107void
108SimObject::resetStats()
109{
110}
111
112//
113// static function: serialize all SimObjects.
114//
115void
116SimObject::serializeAll(std::ostream &os)
117{
118 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
119 SimObjectList::reverse_iterator rend = simObjectList.rend();
120
121 for (; ri != rend; ++ri) {
122 SimObject *obj = *ri;
123 obj->nameOut(os);
124 obj->serialize(os);
125 }
126}
127
128
129#ifdef DEBUG
130//
131// static function: flag which objects should have the debugger break
132//
133void
134SimObject::debugObjectBreak(const string &objs)
135{
136 SimObjectList::const_iterator i = simObjectList.begin();
137 SimObjectList::const_iterator end = simObjectList.end();
138
139 ObjectMatch match(objs);
140 for (; i != end; ++i) {
141 SimObject *obj = *i;
142 obj->doDebugBreak = match.match(obj->name());
143 }
144}
145
146void
147debugObjectBreak(const char *objs)
148{
149 SimObject::debugObjectBreak(string(objs));
150}
151#endif
152
153unsigned int
154SimObject::drain(Event *drain_event)
155{
156 state = Drained;
157 return 0;
158}
159
160void
161SimObject::resume()
162{
163 state = Running;
164}
165
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * Copyright (c) 2010 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Steve Reinhardt
30 * Nathan Binkert
31 */
32
33#include <cassert>
34
35#include "base/callback.hh"
36#include "base/inifile.hh"
37#include "base/match.hh"
38#include "base/misc.hh"
39#include "base/trace.hh"
40#include "base/types.hh"
41#include "debug/Checkpoint.hh"
42#include "sim/sim_object.hh"
43#include "sim/stats.hh"
44
45using namespace std;
46
47
48////////////////////////////////////////////////////////////////////////
49//
50// SimObject member definitions
51//
52////////////////////////////////////////////////////////////////////////
53
54//
55// static list of all SimObjects, used for initialization etc.
56//
57SimObject::SimObjectList SimObject::simObjectList;
58
59//
60// SimObject constructor: used to maintain static simObjectList
61//
62SimObject::SimObject(const Params *p)
63 : EventManager(p->eventq), _params(p)
64{
65#ifdef DEBUG
66 doDebugBreak = false;
67#endif
68
69 simObjectList.push_back(this);
70 state = Running;
71}
72
73void
74SimObject::init()
75{
76}
77
78void
79SimObject::loadState(Checkpoint *cp)
80{
81 if (cp->sectionExists(name())) {
82 DPRINTF(Checkpoint, "unserializing\n");
83 unserialize(cp, name());
84 } else {
85 DPRINTF(Checkpoint, "no checkpoint section found\n");
86 }
87}
88
89void
90SimObject::initState()
91{
92}
93
94void
95SimObject::startup()
96{
97}
98
99//
100// no default statistics, so nothing to do in base implementation
101//
102void
103SimObject::regStats()
104{
105}
106
107void
108SimObject::resetStats()
109{
110}
111
112//
113// static function: serialize all SimObjects.
114//
115void
116SimObject::serializeAll(std::ostream &os)
117{
118 SimObjectList::reverse_iterator ri = simObjectList.rbegin();
119 SimObjectList::reverse_iterator rend = simObjectList.rend();
120
121 for (; ri != rend; ++ri) {
122 SimObject *obj = *ri;
123 obj->nameOut(os);
124 obj->serialize(os);
125 }
126}
127
128
129#ifdef DEBUG
130//
131// static function: flag which objects should have the debugger break
132//
133void
134SimObject::debugObjectBreak(const string &objs)
135{
136 SimObjectList::const_iterator i = simObjectList.begin();
137 SimObjectList::const_iterator end = simObjectList.end();
138
139 ObjectMatch match(objs);
140 for (; i != end; ++i) {
141 SimObject *obj = *i;
142 obj->doDebugBreak = match.match(obj->name());
143 }
144}
145
146void
147debugObjectBreak(const char *objs)
148{
149 SimObject::debugObjectBreak(string(objs));
150}
151#endif
152
153unsigned int
154SimObject::drain(Event *drain_event)
155{
156 state = Drained;
157 return 0;
158}
159
160void
161SimObject::resume()
162{
163 state = Running;
164}
165
166void
167SimObject::switchOut()
168{
169 panic("Unimplemented!");
170}
171
172void
173SimObject::takeOverFrom(BaseCPU *cpu)
174{
175 panic("Unimplemented!");
176}
177
178
179SimObject *
180SimObject::find(const char *name)
181{
182 SimObjectList::const_iterator i = simObjectList.begin();
183 SimObjectList::const_iterator end = simObjectList.end();
184
185 for (; i != end; ++i) {
186 SimObject *obj = *i;
187 if (obj->name() == name)
188 return obj;
189 }
190
191 return NULL;
192}
166SimObject *
167SimObject::find(const char *name)
168{
169 SimObjectList::const_iterator i = simObjectList.begin();
170 SimObjectList::const_iterator end = simObjectList.end();
171
172 for (; i != end; ++i) {
173 SimObject *obj = *i;
174 if (obj->name() == name)
175 return obj;
176 }
177
178 return NULL;
179}